| Message ID | 20221208062513.2589476-5-xiaoyao.li@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Make Intel PT configurable | expand |
On 12/8/2022 2:25 PM, Xiaoyao Li wrote: > Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL > PT ADDR RANGES. For unsupported value that exceeds what KVM reports, > report it as a whole in mark_unavailable_features() as well. > Maybe this patch can be put before 3/8. > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> > --- > target/i386/cpu.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 65c6f8ae771a..4d7beccc0af7 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -4387,7 +4387,14 @@ static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint64_t mask, > return; > } > > - for (i = 0; i < 64; ++i) { > + if ((w == FEAT_14_1_EAX) && (mask & INTEL_PT_ADDR_RANGES_NUM_MASK)) { > + warn_report("%s: CPUID.14H_01H:EAX [bit 2:0]", verbose_prefix); > + i = 3; > + } else { > + i = 0; > + } > + > + for (; i < 64; ++i) { > if ((1ULL << i) & mask) { > g_autofree char *feat_word_str = feature_word_description(f, i); > warn_report("%s: %s%s%s [bit %d]",
On 12/9/2022 2:43 PM, Chenyi Qiang wrote: > > > On 12/8/2022 2:25 PM, Xiaoyao Li wrote: >> Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL >> PT ADDR RANGES. For unsupported value that exceeds what KVM reports, >> report it as a whole in mark_unavailable_features() as well. >> > > Maybe this patch can be put before 3/8. patch 3 introduces the logic to check bit 2:0 of CPUID leaf 14_1 as whole. So it's better to be after patch 3. + /* Bits 2:0 are as a whole to represent INTEL_PT_ADDR_RANGES */ + if ((requested_features & INTEL_PT_ADDR_RANGES_NUM_MASK) > + (host_feat & INTEL_PT_ADDR_RANGES_NUM_MASK)) { + unavailable_features |= requested_features & + INTEL_PT_ADDR_RANGES_NUM_MASK; >> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> >> --- >> target/i386/cpu.c | 9 ++++++++- >> 1 file changed, 8 insertions(+), 1 deletion(-) >> >> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >> index 65c6f8ae771a..4d7beccc0af7 100644 >> --- a/target/i386/cpu.c >> +++ b/target/i386/cpu.c >> @@ -4387,7 +4387,14 @@ static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint64_t mask, >> return; >> } >> >> - for (i = 0; i < 64; ++i) { >> + if ((w == FEAT_14_1_EAX) && (mask & INTEL_PT_ADDR_RANGES_NUM_MASK)) { >> + warn_report("%s: CPUID.14H_01H:EAX [bit 2:0]", verbose_prefix); >> + i = 3; >> + } else { >> + i = 0; >> + } >> + >> + for (; i < 64; ++i) { >> if ((1ULL << i) & mask) { >> g_autofree char *feat_word_str = feature_word_description(f, i); >> warn_report("%s: %s%s%s [bit %d]",
On 12/13/2022 8:09 PM, Xiaoyao Li wrote: > On 12/9/2022 2:43 PM, Chenyi Qiang wrote: >> >> >> On 12/8/2022 2:25 PM, Xiaoyao Li wrote: >>> Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL >>> PT ADDR RANGES. For unsupported value that exceeds what KVM reports, >>> report it as a whole in mark_unavailable_features() as well. >>> >> >> Maybe this patch can be put before 3/8. > > patch 3 introduces the logic to check bit 2:0 of CPUID leaf 14_1 as > whole. So it's better to be after patch 3. > > + /* Bits 2:0 are as a whole to represent > INTEL_PT_ADDR_RANGES */ > + if ((requested_features & INTEL_PT_ADDR_RANGES_NUM_MASK) > > + (host_feat & INTEL_PT_ADDR_RANGES_NUM_MASK)) { > + unavailable_features |= requested_features & > + INTEL_PT_ADDR_RANGES_NUM_MASK; > Yeah, I didn't notice Eduardo prefer having duplicate error message showing bit 2,1,0 which I considered to avoid. Then it's OK. >>> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> >>> --- >>> target/i386/cpu.c | 9 ++++++++- >>> 1 file changed, 8 insertions(+), 1 deletion(-) >>> >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >>> index 65c6f8ae771a..4d7beccc0af7 100644 >>> --- a/target/i386/cpu.c >>> +++ b/target/i386/cpu.c >>> @@ -4387,7 +4387,14 @@ static void mark_unavailable_features(X86CPU >>> *cpu, FeatureWord w, uint64_t mask, >>> return; >>> } >>> - for (i = 0; i < 64; ++i) { >>> + if ((w == FEAT_14_1_EAX) && (mask & >>> INTEL_PT_ADDR_RANGES_NUM_MASK)) { >>> + warn_report("%s: CPUID.14H_01H:EAX [bit 2:0]", verbose_prefix); >>> + i = 3; >>> + } else { >>> + i = 0; >>> + } >>> + >>> + for (; i < 64; ++i) { >>> if ((1ULL << i) & mask) { >>> g_autofree char *feat_word_str = >>> feature_word_description(f, i); >>> warn_report("%s: %s%s%s [bit %d]", >
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 65c6f8ae771a..4d7beccc0af7 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4387,7 +4387,14 @@ static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint64_t mask, return; } - for (i = 0; i < 64; ++i) { + if ((w == FEAT_14_1_EAX) && (mask & INTEL_PT_ADDR_RANGES_NUM_MASK)) { + warn_report("%s: CPUID.14H_01H:EAX [bit 2:0]", verbose_prefix); + i = 3; + } else { + i = 0; + } + + for (; i < 64; ++i) { if ((1ULL << i) & mask) { g_autofree char *feat_word_str = feature_word_description(f, i); warn_report("%s: %s%s%s [bit %d]",
Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL PT ADDR RANGES. For unsupported value that exceeds what KVM reports, report it as a whole in mark_unavailable_features() as well. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> --- target/i386/cpu.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)