Message ID | 20221211215843.24024-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | [RFC] clocksource/drivers/riscv: Get rid of clocksource_arch_init() callback | expand |
On Sun, Dec 11, 2022 at 9:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Having a clocksource_arch_init() callback always sets vdso_clock_mode to > VDSO_CLOCKMODE_ARCHTIMER if GENERIC_GETTIMEOFDAY is enabled, this is > required for the riscv-timer. > > This works for platforms where just riscv-timer clocksource is present. > On platforms where other clock sources are available we want them to > register with vdso_clock_mode set to VDSO_CLOCKMODE_NONE. > > On the Renesas RZ/Five SoC OSTM block can be used as clocksource [0], to > avoid multiple clock sources being registered as VDSO_CLOCKMODE_ARCHTIMER > move setting of vdso_clock_mode in the riscv-timer driver instead of doing > this in clocksource_arch_init() callback as done similarly for ARM/64 > architecture. > > [0] drivers/clocksource/renesas-ostm.c > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > arch/riscv/Kconfig | 1 - > arch/riscv/kernel/time.c | 9 --------- > drivers/clocksource/timer-riscv.c | 7 +++++++ > 3 files changed, 7 insertions(+), 10 deletions(-) > Gentle ping for review. Cheers, Prabhakar
On 12/11/22 15:58, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Having a clocksource_arch_init() callback always sets vdso_clock_mode to > VDSO_CLOCKMODE_ARCHTIMER if GENERIC_GETTIMEOFDAY is enabled, this is > required for the riscv-timer. > > This works for platforms where just riscv-timer clocksource is present. > On platforms where other clock sources are available we want them to > register with vdso_clock_mode set to VDSO_CLOCKMODE_NONE. > > On the Renesas RZ/Five SoC OSTM block can be used as clocksource [0], to > avoid multiple clock sources being registered as VDSO_CLOCKMODE_ARCHTIMER > move setting of vdso_clock_mode in the riscv-timer driver instead of doing > this in clocksource_arch_init() callback as done similarly for ARM/64 > architecture. This is definitely a good change to make, but shouldn't we still prefer the architectural CSR-based clocksource over an MMIO-based clocksource? It has double the number of bits, and reading it should have less overhead. So I think we also want to increase the rating of riscv_clocksource. D1 is in the same situation, as timer-sun4i.c registers a clocksource with a higher rating than riscv_clocksource. Without this patch, tools/testing/selftests/vDSO/vdso_test_correctness fails. With this patch, it passes, so: Tested-by: Samuel Holland <samuel@sholland.org> > [0] drivers/clocksource/renesas-ostm.c > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > arch/riscv/Kconfig | 1 - > arch/riscv/kernel/time.c | 9 --------- > drivers/clocksource/timer-riscv.c | 7 +++++++ > 3 files changed, 7 insertions(+), 10 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 7ea12de636bd..b269e062c1b1 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -12,7 +12,6 @@ config 32BIT > > config RISCV > def_bool y > - select ARCH_CLOCKSOURCE_INIT > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > select ARCH_HAS_BINFMT_FLAT > diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c > index 8217b0f67c6c..42bee305e997 100644 > --- a/arch/riscv/kernel/time.c > +++ b/arch/riscv/kernel/time.c > @@ -30,12 +30,3 @@ void __init time_init(void) > of_clk_init(NULL); > timer_probe(); > } > - > -void clocksource_arch_init(struct clocksource *cs) > -{ > -#ifdef CONFIG_GENERIC_GETTIMEOFDAY > - cs->vdso_clock_mode = VDSO_CLOCKMODE_ARCHTIMER; > -#else > - cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; > -#endif > -} > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 969a552da8d2..7ec9668cd36d 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -29,6 +29,12 @@ > > static DEFINE_STATIC_KEY_FALSE(riscv_sstc_available); > > +#ifdef CONFIG_GENERIC_GETTIMEOFDAY > +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_ARCHTIMER; > +#else > +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_NONE; > +#endif /* CONFIG_GENERIC_GETTIMEOFDAY */ We don't have any workarounds like arm_arch_timer, so we do not need this indirection through vdso_default. You can set .vdso_clock_mode directly in the declaration of riscv_clocksource. Regards, Samuel > + > static int riscv_clock_next_event(unsigned long delta, > struct clock_event_device *ce) > { > @@ -158,6 +164,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) > return -ENODEV; > } > > + riscv_clocksource.vdso_clock_mode = vdso_default; > pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", > __func__, cpuid, hartid); > error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
Hi Samuel, Thank you for the review. On Tue, Dec 27, 2022 at 11:17 PM Samuel Holland <samuel@sholland.org> wrote: > > On 12/11/22 15:58, Prabhakar wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Having a clocksource_arch_init() callback always sets vdso_clock_mode to > > VDSO_CLOCKMODE_ARCHTIMER if GENERIC_GETTIMEOFDAY is enabled, this is > > required for the riscv-timer. > > > > This works for platforms where just riscv-timer clocksource is present. > > On platforms where other clock sources are available we want them to > > register with vdso_clock_mode set to VDSO_CLOCKMODE_NONE. > > > > On the Renesas RZ/Five SoC OSTM block can be used as clocksource [0], to > > avoid multiple clock sources being registered as VDSO_CLOCKMODE_ARCHTIMER > > move setting of vdso_clock_mode in the riscv-timer driver instead of doing > > this in clocksource_arch_init() callback as done similarly for ARM/64 > > architecture. > > This is definitely a good change to make, but shouldn't we still prefer > the architectural CSR-based clocksource over an MMIO-based clocksource? > It has double the number of bits, and reading it should have less > overhead. So I think we also want to increase the rating of > riscv_clocksource. > For which now you have already have a patch posted. > D1 is in the same situation, as timer-sun4i.c registers a clocksource > with a higher rating than riscv_clocksource. Without this patch, > tools/testing/selftests/vDSO/vdso_test_correctness fails. With this > patch, it passes, so: > > Tested-by: Samuel Holland <samuel@sholland.org> > > > [0] drivers/clocksource/renesas-ostm.c > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > arch/riscv/Kconfig | 1 - > > arch/riscv/kernel/time.c | 9 --------- > > drivers/clocksource/timer-riscv.c | 7 +++++++ > > 3 files changed, 7 insertions(+), 10 deletions(-) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 7ea12de636bd..b269e062c1b1 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -12,7 +12,6 @@ config 32BIT > > > > config RISCV > > def_bool y > > - select ARCH_CLOCKSOURCE_INIT > > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > > select ARCH_HAS_BINFMT_FLAT > > diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c > > index 8217b0f67c6c..42bee305e997 100644 > > --- a/arch/riscv/kernel/time.c > > +++ b/arch/riscv/kernel/time.c > > @@ -30,12 +30,3 @@ void __init time_init(void) > > of_clk_init(NULL); > > timer_probe(); > > } > > - > > -void clocksource_arch_init(struct clocksource *cs) > > -{ > > -#ifdef CONFIG_GENERIC_GETTIMEOFDAY > > - cs->vdso_clock_mode = VDSO_CLOCKMODE_ARCHTIMER; > > -#else > > - cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; > > -#endif > > -} > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > > index 969a552da8d2..7ec9668cd36d 100644 > > --- a/drivers/clocksource/timer-riscv.c > > +++ b/drivers/clocksource/timer-riscv.c > > @@ -29,6 +29,12 @@ > > > > static DEFINE_STATIC_KEY_FALSE(riscv_sstc_available); > > > > +#ifdef CONFIG_GENERIC_GETTIMEOFDAY > > +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_ARCHTIMER; > > +#else > > +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_NONE; > > +#endif /* CONFIG_GENERIC_GETTIMEOFDAY */ > > We don't have any workarounds like arm_arch_timer, so we do not need > this indirection through vdso_default. You can set .vdso_clock_mode > directly in the declaration of riscv_clocksource. > Agreed, I'll do that in v2. Cheers, Prabhakar
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7ea12de636bd..b269e062c1b1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,7 +12,6 @@ config 32BIT config RISCV def_bool y - select ARCH_CLOCKSOURCE_INIT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_HAS_BINFMT_FLAT diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 8217b0f67c6c..42bee305e997 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -30,12 +30,3 @@ void __init time_init(void) of_clk_init(NULL); timer_probe(); } - -void clocksource_arch_init(struct clocksource *cs) -{ -#ifdef CONFIG_GENERIC_GETTIMEOFDAY - cs->vdso_clock_mode = VDSO_CLOCKMODE_ARCHTIMER; -#else - cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; -#endif -} diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 969a552da8d2..7ec9668cd36d 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -29,6 +29,12 @@ static DEFINE_STATIC_KEY_FALSE(riscv_sstc_available); +#ifdef CONFIG_GENERIC_GETTIMEOFDAY +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_ARCHTIMER; +#else +static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_NONE; +#endif /* CONFIG_GENERIC_GETTIMEOFDAY */ + static int riscv_clock_next_event(unsigned long delta, struct clock_event_device *ce) { @@ -158,6 +164,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) return -ENODEV; } + riscv_clocksource.vdso_clock_mode = vdso_default; pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", __func__, cpuid, hartid); error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);