diff mbox series

[v3,03/11] reset: Create subdirectory for StarFive drivers

Message ID 20221220005054.34518-4-hal.feng@starfivetech.com (mailing list archive)
State Superseded, archived
Headers show
Series Basic clock and reset support for StarFive JH7110 RISC-V SoC | expand

Commit Message

Hal Feng Dec. 20, 2022, 12:50 a.m. UTC 
From: Emil Renner Berthing <kernel@esmil.dk>

This moves the StarFive JH7100 reset driver to a new subdirectory in
preparation for adding more StarFive reset drivers.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
 MAINTAINERS                                          | 2 +-
 drivers/reset/Kconfig                                | 8 +-------
 drivers/reset/Makefile                               | 2 +-
 drivers/reset/starfive/Kconfig                       | 8 ++++++++
 drivers/reset/starfive/Makefile                      | 2 ++
 drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
 6 files changed, 13 insertions(+), 9 deletions(-)
 create mode 100644 drivers/reset/starfive/Kconfig
 create mode 100644 drivers/reset/starfive/Makefile
 rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)

Comments

Conor Dooley Dec. 20, 2022, 10:15 p.m. UTC | #1 
On Tue, Dec 20, 2022 at 08:50:46AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
> 
> This moves the StarFive JH7100 reset driver to a new subdirectory in
> preparation for adding more StarFive reset drivers.
> 
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  MAINTAINERS                                          | 2 +-
>  drivers/reset/Kconfig                                | 8 +-------
>  drivers/reset/Makefile                               | 2 +-
>  drivers/reset/starfive/Kconfig                       | 8 ++++++++
>  drivers/reset/starfive/Makefile                      | 2 ++
>  drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
>  6 files changed, 13 insertions(+), 9 deletions(-)
>  create mode 100644 drivers/reset/starfive/Kconfig
>  create mode 100644 drivers/reset/starfive/Makefile
>  rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index fd90403c33bd..117024b52d06 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19651,7 +19651,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER
>  M:	Emil Renner Berthing <kernel@esmil.dk>
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
> -F:	drivers/reset/reset-starfive-jh7100.c
> +F:	drivers/reset/starfive/reset-starfive-jh7100.c
>  F:	include/dt-bindings/reset/starfive-jh7100.h
>  
>  STATIC BRANCH/CALL
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index de176c2fbad9..1e8e1c4954cd 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -232,13 +232,6 @@ config RESET_SOCFPGA
>  	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
>  	  driver gets initialized early during platform init calls.
>  
> -config RESET_STARFIVE_JH7100
> -	bool "StarFive JH7100 Reset Driver"
> -	depends on SOC_STARFIVE || COMPILE_TEST
> -	default SOC_STARFIVE
> -	help
> -	  This enables the reset controller driver for the StarFive JH7100 SoC.
> -
>  config RESET_SUNPLUS
>  	bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
>  	default ARCH_SUNPLUS
> @@ -320,6 +313,7 @@ config RESET_ZYNQ
>  	help
>  	  This enables the reset controller driver for Xilinx Zynq SoCs.
>  
> +source "drivers/reset/starfive/Kconfig"
>  source "drivers/reset/sti/Kconfig"
>  source "drivers/reset/hisilicon/Kconfig"
>  source "drivers/reset/tegra/Kconfig"
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 3e7e5fd633a8..fee17a0e3a16 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-y += core.o
>  obj-y += hisilicon/
> +obj-$(CONFIG_SOC_STARFIVE) += starfive/
>  obj-$(CONFIG_ARCH_STI) += sti/
>  obj-$(CONFIG_ARCH_TEGRA) += tegra/
>  obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
> @@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
>  obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
>  obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
>  obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
> -obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
>  obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
>  obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
>  obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
> diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
> new file mode 100644
> index 000000000000..cddebdba7177
> --- /dev/null
> +++ b/drivers/reset/starfive/Kconfig
> @@ -0,0 +1,8 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +
> +config RESET_STARFIVE_JH7100
> +	bool "StarFive JH7100 Reset Driver"
> +	depends on SOC_STARFIVE || COMPILE_TEST
> +	default SOC_STARFIVE

You could in theory drop the default that I added & replace it with a y,
since the subdir is gated by the symbol. I don't really care though tbh.
The movement seems fine to me..
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.

> +	help
> +	  This enables the reset controller driver for the StarFive JH7100 SoC.
> diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
> new file mode 100644
> index 000000000000..670d049423f5
> --- /dev/null
> +++ b/drivers/reset/starfive/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_RESET_STARFIVE_JH7100)		+= reset-starfive-jh7100.o
> diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
> similarity index 100%
> rename from drivers/reset/reset-starfive-jh7100.c
> rename to drivers/reset/starfive/reset-starfive-jh7100.c
> -- 
> 2.38.1
> 
>
Hal Feng Dec. 23, 2022, 7:02 a.m. UTC | #2 
On Tue, 20 Dec 2022 22:15:10 +0000, Conor Dooley wrote:
> On Tue, Dec 20, 2022 at 08:50:46AM +0800, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel@esmil.dk>
> > 
> > This moves the StarFive JH7100 reset driver to a new subdirectory in
> > preparation for adding more StarFive reset drivers.
> > 
> > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > ---
> >  MAINTAINERS                                          | 2 +-
> >  drivers/reset/Kconfig                                | 8 +-------
> >  drivers/reset/Makefile                               | 2 +-
> >  drivers/reset/starfive/Kconfig                       | 8 ++++++++
> >  drivers/reset/starfive/Makefile                      | 2 ++
> >  drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
> >  6 files changed, 13 insertions(+), 9 deletions(-)
> >  create mode 100644 drivers/reset/starfive/Kconfig
> >  create mode 100644 drivers/reset/starfive/Makefile
> >  rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index fd90403c33bd..117024b52d06 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -19651,7 +19651,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER
> >  M:	Emil Renner Berthing <kernel@esmil.dk>
> >  S:	Maintained
> >  F:	Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
> > -F:	drivers/reset/reset-starfive-jh7100.c
> > +F:	drivers/reset/starfive/reset-starfive-jh7100.c
> >  F:	include/dt-bindings/reset/starfive-jh7100.h
> >  
> >  STATIC BRANCH/CALL
> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> > index de176c2fbad9..1e8e1c4954cd 100644
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -232,13 +232,6 @@ config RESET_SOCFPGA
> >  	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
> >  	  driver gets initialized early during platform init calls.
> >  
> > -config RESET_STARFIVE_JH7100
> > -	bool "StarFive JH7100 Reset Driver"
> > -	depends on SOC_STARFIVE || COMPILE_TEST
> > -	default SOC_STARFIVE
> > -	help
> > -	  This enables the reset controller driver for the StarFive JH7100 SoC.
> > -
> >  config RESET_SUNPLUS
> >  	bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
> >  	default ARCH_SUNPLUS
> > @@ -320,6 +313,7 @@ config RESET_ZYNQ
> >  	help
> >  	  This enables the reset controller driver for Xilinx Zynq SoCs.
> >  
> > +source "drivers/reset/starfive/Kconfig"
> >  source "drivers/reset/sti/Kconfig"
> >  source "drivers/reset/hisilicon/Kconfig"
> >  source "drivers/reset/tegra/Kconfig"
> > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> > index 3e7e5fd633a8..fee17a0e3a16 100644
> > --- a/drivers/reset/Makefile
> > +++ b/drivers/reset/Makefile
> > @@ -1,6 +1,7 @@
> >  # SPDX-License-Identifier: GPL-2.0
> >  obj-y += core.o
> >  obj-y += hisilicon/
> > +obj-$(CONFIG_SOC_STARFIVE) += starfive/
> >  obj-$(CONFIG_ARCH_STI) += sti/
> >  obj-$(CONFIG_ARCH_TEGRA) += tegra/
> >  obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
> > @@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
> >  obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
> >  obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
> >  obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
> > -obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
> >  obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
> >  obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> >  obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
> > diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
> > new file mode 100644
> > index 000000000000..cddebdba7177
> > --- /dev/null
> > +++ b/drivers/reset/starfive/Kconfig
> > @@ -0,0 +1,8 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +
> > +config RESET_STARFIVE_JH7100
> > +	bool "StarFive JH7100 Reset Driver"
> > +	depends on SOC_STARFIVE || COMPILE_TEST
> > +	default SOC_STARFIVE
> 
> You could in theory drop the default that I added & replace it with a y,
> since the subdir is gated by the symbol. I don't really care though tbh.

If you don't mind, I would like to keep it because the starfive clk subdir
did the same before.

Best regards,
Hal

> The movement seems fine to me..
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index fd90403c33bd..117024b52d06 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19651,7 +19651,7 @@  STARFIVE JH7100 RESET CONTROLLER DRIVER
 M:	Emil Renner Berthing <kernel@esmil.dk>
 S:	Maintained
 F:	Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
-F:	drivers/reset/reset-starfive-jh7100.c
+F:	drivers/reset/starfive/reset-starfive-jh7100.c
 F:	include/dt-bindings/reset/starfive-jh7100.h
 
 STATIC BRANCH/CALL
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index de176c2fbad9..1e8e1c4954cd 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -232,13 +232,6 @@  config RESET_SOCFPGA
 	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
 	  driver gets initialized early during platform init calls.
 
-config RESET_STARFIVE_JH7100
-	bool "StarFive JH7100 Reset Driver"
-	depends on SOC_STARFIVE || COMPILE_TEST
-	default SOC_STARFIVE
-	help
-	  This enables the reset controller driver for the StarFive JH7100 SoC.
-
 config RESET_SUNPLUS
 	bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
 	default ARCH_SUNPLUS
@@ -320,6 +313,7 @@  config RESET_ZYNQ
 	help
 	  This enables the reset controller driver for Xilinx Zynq SoCs.
 
+source "drivers/reset/starfive/Kconfig"
 source "drivers/reset/sti/Kconfig"
 source "drivers/reset/hisilicon/Kconfig"
 source "drivers/reset/tegra/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 3e7e5fd633a8..fee17a0e3a16 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1,6 +1,7 @@ 
 # SPDX-License-Identifier: GPL-2.0
 obj-y += core.o
 obj-y += hisilicon/
+obj-$(CONFIG_SOC_STARFIVE) += starfive/
 obj-$(CONFIG_ARCH_STI) += sti/
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
@@ -30,7 +31,6 @@  obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
 obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
 obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
 obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
-obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
 obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
new file mode 100644
index 000000000000..cddebdba7177
--- /dev/null
+++ b/drivers/reset/starfive/Kconfig
@@ -0,0 +1,8 @@ 
+# SPDX-License-Identifier: GPL-2.0-only
+
+config RESET_STARFIVE_JH7100
+	bool "StarFive JH7100 Reset Driver"
+	depends on SOC_STARFIVE || COMPILE_TEST
+	default SOC_STARFIVE
+	help
+	  This enables the reset controller driver for the StarFive JH7100 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
new file mode 100644
index 000000000000..670d049423f5
--- /dev/null
+++ b/drivers/reset/starfive/Makefile
@@ -0,0 +1,2 @@ 
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_RESET_STARFIVE_JH7100)		+= reset-starfive-jh7100.o
diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
similarity index 100%
rename from drivers/reset/reset-starfive-jh7100.c
rename to drivers/reset/starfive/reset-starfive-jh7100.c