| Message ID | 20221216213343.1140143-1-marijn.suijten@somainline.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to match bindings | expand |
On 16.12.2022 22:33, Marijn Suijten wrote: > Reorder the clocks and corresponding names to match the QUSB2 phy > schema, fixing the following CHECK_DTBS errors: > > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:0: 'cfg_ahb' was expected > From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:1: 'ref' was expected > From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > > Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6125.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 7e25a4f85594..bf9e8d45ee44 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -442,9 +442,9 @@ hsusb_phy1: phy@1613000 { > reg = <0x01613000 0x180>; > #phy-cells = <0>; > > - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, > - <&gcc GCC_AHB2PHY_USB_CLK>; > - clock-names = "ref", "cfg_ahb"; > + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, > + <&rpmcc RPM_SMD_XO_CLK_SRC>; > + clock-names = "cfg_ahb", "ref"; > > resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; > status = "disabled";
On Fri, Dec 16 2022 at 10:33:43 PM +01:00:00, Marijn Suijten <marijn.suijten@somainline.org> wrote: > Reorder the clocks and corresponding names to match the QUSB2 phy > schema, fixing the following CHECK_DTBS errors: > > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: > phy@1613000: clock-names:0: 'cfg_ahb' was expected > From schema: > /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: > phy@1613000: clock-names:1: 'ref' was expected > From schema: > /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > > Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sm6125.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi > b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 7e25a4f85594..bf9e8d45ee44 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -442,9 +442,9 @@ hsusb_phy1: phy@1613000 { > reg = <0x01613000 0x180>; > #phy-cells = <0>; > > - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, > - <&gcc GCC_AHB2PHY_USB_CLK>; > - clock-names = "ref", "cfg_ahb"; > + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, > + <&rpmcc RPM_SMD_XO_CLK_SRC>; > + clock-names = "cfg_ahb", "ref"; > Reviewed-by: Martin Botka <martin.botka@somainline.org> -Martin > resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; > status = "disabled"; > -- > 2.39.0 >
On Fri, 16 Dec 2022 22:33:43 +0100, Marijn Suijten wrote: > Reorder the clocks and corresponding names to match the QUSB2 phy > schema, fixing the following CHECK_DTBS errors: > > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:0: 'cfg_ahb' was expected > From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:1: 'ref' was expected > From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > > [...] Applied, thanks! [1/1] arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to match bindings commit: 8416262b0ea46d84767141b074748f4d4f37736a Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 7e25a4f85594..bf9e8d45ee44 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -442,9 +442,9 @@ hsusb_phy1: phy@1613000 { reg = <0x01613000 0x180>; #phy-cells = <0>; - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, - <&gcc GCC_AHB2PHY_USB_CLK>; - clock-names = "ref", "cfg_ahb"; + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; status = "disabled";
Reorder the clocks and corresponding names to match the QUSB2 phy schema, fixing the following CHECK_DTBS errors: arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:0: 'cfg_ahb' was expected From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:1: 'ref' was expected From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)