| Message ID | 20230105201242.189195-2-fabrizio.castro.jz@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Driver support for RZ/V2M PWC | expand |
On Thu, 05 Jan 2023, Fabrizio Castro wrote: > The Renesas RZ/V2M External Power Sequence Controller (PWC) > IP is a multi-function device, and it's capable of: > * external power supply on/off sequence generation > * on/off signal generation for the LPDDR4 core power supply (LPVDD) > * key input signals processing > * general-purpose output pins The subject line now needs changing. This patch doesn't have anything to do with MFD. > Add the corresponding dt-bindings. > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > > v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes. > v2->v3: No change. > v3->v4: Moved file under Documentation/devicetree/bindings/soc/renesas, > and changed $id accordingly. Rob, I have kept your Reviewed-by > tag assuming you are still happy, please do jump in if you think > that's not appropriate anymore. > > .../soc/renesas/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml
Hi Lee, Thanks for your feedback! > > On Thu, 05 Jan 2023, Fabrizio Castro wrote: > > > The Renesas RZ/V2M External Power Sequence Controller (PWC) > > IP is a multi-function device, and it's capable of: > > * external power supply on/off sequence generation > > * on/off signal generation for the LPDDR4 core power supply (LPVDD) > > * key input signals processing > > * general-purpose output pins > > The subject line now needs changing. > > This patch doesn't have anything to do with MFD. Doh, you are absolutely right, I'll send a v5 to address that. Thanks, Fab > > > Add the corresponding dt-bindings. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > --- > > > > v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child > nodes. > > v2->v3: No change. > > v3->v4: Moved file under Documentation/devicetree/bindings/soc/renesas, > > and changed $id accordingly. Rob, I have kept your Reviewed-by > > tag assuming you are still happy, please do jump in if you think > > that's not appropriate anymore. > > > > .../soc/renesas/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++ > > 1 file changed, 56 insertions(+) > > create mode 100644 > Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml > > -- > Lee Jones [李琼斯]
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml new file mode 100644 index 000000000000..12df33f58484 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M External Power Sequence Controller (PWC) + +description: |+ + The PWC IP found in the RZ/V2M family of chips comes with the below + capabilities + - external power supply on/off sequence generation + - on/off signal generation for the LPDDR4 core power supply (LPVDD) + - key input signals processing + - general-purpose output pins + +maintainers: + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> + +properties: + compatible: + items: + - enum: + - renesas,r9a09g011-pwc # RZ/V2M + - renesas,r9a09g055-pwc # RZ/V2MA + - const: renesas,rzv2m-pwc + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + renesas,rzv2m-pwc-power: + description: The PWC is used to control the system power supplies. + type: boolean + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + pwc: pwc@a3700000 { + compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc"; + reg = <0xa3700000 0x800>; + gpio-controller; + #gpio-cells = <2>; + renesas,rzv2m-pwc-power; + };