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[net-next,v2,0/4] net: ethernet: renesas: rswitch: Modify initialization for SERDES and PHY

Message ID 20230110050206.116110-1-yoshihiro.shimoda.uh@renesas.com (mailing list archive)
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Series net: ethernet: renesas: rswitch: Modify initialization for SERDES and PHY | expand

Message

Yoshihiro Shimoda Jan. 10, 2023, 5:02 a.m. UTC
The patch [1/4] sets phydev->host_interfaces by phylink for Marvell PHY
driver (marvell10g) to initialize the MACTYPE.

The patch [2/4] siplifies the rswitch driver, the patch [3/4] enables
the ovr_host_interfaces flag, and the patch [4/4] phy_power_on() calling
to initialize the Ethernet SERDES PHY driver (r8a779f0-eth-serdes)
for each channel.

Changes from v1:
https://lore.kernel.org/all/20221226071425.3895915-1-yoshihiro.shimoda.uh@renesas.com/
 - Add a new flag (ovr_host_interfaces) into phylink_config in the patch [1/4].
 - Add a new patch [3/4] for the new flag.
 - Add a error message to the patch [4/4/] for MLO_AN_INBAND mode.

Yoshihiro Shimoda (4):
  net: phylink: Set host_interfaces for a non-sfp PHY
  net: ethernet: renesas: rswitch: Simplify struct phy * handling
  net: ethernet: renesas: rswitch: Enable ovr_host_interfaces
  net: ethernet: renesas: rswitch: Add phy_power_{on,off}() calling

 drivers/net/ethernet/renesas/rswitch.c | 53 +++++++++++++++-----------
 drivers/net/ethernet/renesas/rswitch.h |  1 +
 drivers/net/phy/phylink.c              |  9 +++++
 include/linux/phylink.h                |  3 ++
 4 files changed, 44 insertions(+), 22 deletions(-)

Comments

Russell King (Oracle) Jan. 10, 2023, 2:35 p.m. UTC | #1
On Tue, Jan 10, 2023 at 02:02:02PM +0900, Yoshihiro Shimoda wrote:
> The patch [1/4] sets phydev->host_interfaces by phylink for Marvell PHY
> driver (marvell10g) to initialize the MACTYPE.

I don't yet understand the "why" behind the need for this. Doesn't your
platform strap the 88x3310 correctly, so MACTYPE is properly set?
Yoshihiro Shimoda Jan. 12, 2023, 1:09 a.m. UTC | #2
Hi Russell,

> From: Russell King, Sent: Tuesday, January 10, 2023 11:36 PM
> 
> On Tue, Jan 10, 2023 at 02:02:02PM +0900, Yoshihiro Shimoda wrote:
> > The patch [1/4] sets phydev->host_interfaces by phylink for Marvell PHY
> > driver (marvell10g) to initialize the MACTYPE.
> 
> I don't yet understand the "why" behind the need for this. Doesn't your
> platform strap the 88x3310 correctly, so MACTYPE is properly set?

Oops! I should have shared why the patches are needed.

You're correct.
- My platform has the 88x2110.
- The MACTYPE setting of strap pin on the platform is SXGMII.
- However, we realized that the SoC cannot communicate the PHY with SXGMII
  because of mismatching hardware specification.
- We have a lot of boards which mismatch the MACTYPE setting.

So, I would like to change the MACTYPE as SGMII by software for the platform.

Best regards,
Yoshihiro Shimoda