Message ID | 20230110050206.116110-1-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
---|---|
Headers | show |
Series | net: ethernet: renesas: rswitch: Modify initialization for SERDES and PHY | expand |
On Tue, Jan 10, 2023 at 02:02:02PM +0900, Yoshihiro Shimoda wrote: > The patch [1/4] sets phydev->host_interfaces by phylink for Marvell PHY > driver (marvell10g) to initialize the MACTYPE. I don't yet understand the "why" behind the need for this. Doesn't your platform strap the 88x3310 correctly, so MACTYPE is properly set?
Hi Russell, > From: Russell King, Sent: Tuesday, January 10, 2023 11:36 PM > > On Tue, Jan 10, 2023 at 02:02:02PM +0900, Yoshihiro Shimoda wrote: > > The patch [1/4] sets phydev->host_interfaces by phylink for Marvell PHY > > driver (marvell10g) to initialize the MACTYPE. > > I don't yet understand the "why" behind the need for this. Doesn't your > platform strap the 88x3310 correctly, so MACTYPE is properly set? Oops! I should have shared why the patches are needed. You're correct. - My platform has the 88x2110. - The MACTYPE setting of strap pin on the platform is SXGMII. - However, we realized that the SoC cannot communicate the PHY with SXGMII because of mismatching hardware specification. - We have a lot of boards which mismatch the MACTYPE setting. So, I would like to change the MACTYPE as SGMII by software for the platform. Best regards, Yoshihiro Shimoda