| Message ID | 20230110050206.116110-2-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: ethernet: renesas: rswitch: Modify initialization for SERDES and PHY | expand |
Hi Yoshihiro, On Tue, 2023-01-10 at 14:02 +0900, Yoshihiro Shimoda wrote: > If a new flag (ovr_host_interfaces) in the phylink_config is set, > overwrite the host_interfaces in the phy_device by link_interface. > > Note that an ethernet PHY driver like marvell10g will check > PHY_INTERFACE_MODE_SGMII in the host_interfaces whther the host > controller supports a rate matching interface mode or not. So, set > PHY_INTERFACE_MODE_SGMII to the host_interfaces if it is set in > the supported_interfaces. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > drivers/net/phy/phylink.c | 9 +++++++++ > include/linux/phylink.h | 3 +++ > 2 files changed, 12 insertions(+) > > diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c > index 09cc65c0da93..0d863e55994e 100644 > --- a/drivers/net/phy/phylink.c > +++ b/drivers/net/phy/phylink.c > @@ -1809,6 +1809,15 @@ int phylink_fwnode_phy_connect(struct phylink > *pl, > pl->link_interface = phy_dev->interface; > pl->link_config.interface = pl->link_interface; > } > + if (pl->config->ovr_host_interfaces) { > + __set_bit(pl->link_interface, phy_dev- > >host_interfaces); Blank line before comment will increase the readability. > + /* An ethernet PHY driver will check > PHY_INTERFACE_MODE_SGMII > + * in the host_interfaces whether the host controller > supports > + * a rate matching interface mode or not. > + */ Commit message description and this comment are same. following code snippet implies it test the SGMII in supported interfaces and set it in phy_dev. > + if (test_bit(PHY_INTERFACE_MODE_SGMII, pl->config- > >supported_interfaces)) > + __set_bit(PHY_INTERFACE_MODE_SGMII, phy_dev- > >host_interfaces); > + } > > ret = phy_attach_direct(pl->netdev, phy_dev, flags, > pl->link_interface); >
Hi Arun, > From: Arun.Ramadoss@microchip.com, Sent: Tuesday, January 10, 2023 11:21 PM > > Hi Yoshihiro, > On Tue, 2023-01-10 at 14:02 +0900, Yoshihiro Shimoda wrote: > > If a new flag (ovr_host_interfaces) in the phylink_config is set, > > overwrite the host_interfaces in the phy_device by link_interface. > > > > Note that an ethernet PHY driver like marvell10g will check > > PHY_INTERFACE_MODE_SGMII in the host_interfaces whther the host > > controller supports a rate matching interface mode or not. So, set > > PHY_INTERFACE_MODE_SGMII to the host_interfaces if it is set in > > the supported_interfaces. > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > --- > > drivers/net/phy/phylink.c | 9 +++++++++ > > include/linux/phylink.h | 3 +++ > > 2 files changed, 12 insertions(+) > > > > diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c > > index 09cc65c0da93..0d863e55994e 100644 > > --- a/drivers/net/phy/phylink.c > > +++ b/drivers/net/phy/phylink.c > > @@ -1809,6 +1809,15 @@ int phylink_fwnode_phy_connect(struct phylink > > *pl, > > pl->link_interface = phy_dev->interface; > > pl->link_config.interface = pl->link_interface; > > } > > + if (pl->config->ovr_host_interfaces) { > > + __set_bit(pl->link_interface, phy_dev- > > >host_interfaces); > > Blank line before comment will increase the readability. I got it. > > + /* An ethernet PHY driver will check > > PHY_INTERFACE_MODE_SGMII > > + * in the host_interfaces whether the host controller > > supports > > + * a rate matching interface mode or not. > > + */ > > Commit message description and this comment are same. following code > snippet implies it test the SGMII in supported interfaces and set it in > phy_dev. Thank you for your comment! You're correct. But, I don't understand what I should fix. Best regards, Yoshihiro Shimoda > > + if (test_bit(PHY_INTERFACE_MODE_SGMII, pl->config- > > >supported_interfaces)) > > + __set_bit(PHY_INTERFACE_MODE_SGMII, phy_dev- > > >host_interfaces); > > + } > > > > ret = phy_attach_direct(pl->netdev, phy_dev, flags, > > pl->link_interface); > >
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 09cc65c0da93..0d863e55994e 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1809,6 +1809,15 @@ int phylink_fwnode_phy_connect(struct phylink *pl, pl->link_interface = phy_dev->interface; pl->link_config.interface = pl->link_interface; } + if (pl->config->ovr_host_interfaces) { + __set_bit(pl->link_interface, phy_dev->host_interfaces); + /* An ethernet PHY driver will check PHY_INTERFACE_MODE_SGMII + * in the host_interfaces whether the host controller supports + * a rate matching interface mode or not. + */ + if (test_bit(PHY_INTERFACE_MODE_SGMII, pl->config->supported_interfaces)) + __set_bit(PHY_INTERFACE_MODE_SGMII, phy_dev->host_interfaces); + } ret = phy_attach_direct(pl->netdev, phy_dev, flags, pl->link_interface); diff --git a/include/linux/phylink.h b/include/linux/phylink.h index c492c26202b5..c8dd53b1e857 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -124,6 +124,8 @@ enum phylink_op_type { * if MAC link is at %MLO_AN_FIXED mode. * @mac_managed_pm: if true, indicate the MAC driver is responsible for PHY PM. * @ovr_an_inband: if true, override PCS to MLO_AN_INBAND + * @ovr_host_interfaces: if true, override host_interfaces of phy_device from + * link_interface. * @get_fixed_state: callback to execute to determine the fixed link state, * if MAC link is at %MLO_AN_FIXED mode. * @supported_interfaces: bitmap describing which PHY_INTERFACE_MODE_xxx @@ -137,6 +139,7 @@ struct phylink_config { bool poll_fixed_state; bool mac_managed_pm; bool ovr_an_inband; + bool ovr_host_interfaces; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state); DECLARE_PHY_INTERFACE_MASK(supported_interfaces);
If a new flag (ovr_host_interfaces) in the phylink_config is set, overwrite the host_interfaces in the phy_device by link_interface. Note that an ethernet PHY driver like marvell10g will check PHY_INTERFACE_MODE_SGMII in the host_interfaces whther the host controller supports a rate matching interface mode or not. So, set PHY_INTERFACE_MODE_SGMII to the host_interfaces if it is set in the supported_interfaces. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/net/phy/phylink.c | 9 +++++++++ include/linux/phylink.h | 3 +++ 2 files changed, 12 insertions(+)