| Message ID | 20230114071009.88102-1-manivannan.sadhasivam@linaro.org |
|---|---|
| Headers | show |
| Series | ufs: qcom: Add HS-G4 support | expand |
On 14-01-23, 12:39, Manivannan Sadhasivam wrote: > Hello, > > This series adds HS-G4 support to the Qcom UFS driver and PHY driver. > The newer Qcom platforms support configuring the UFS controller and PHY > in dual gears (i.e., controller/PHY can be configured to run in two gear > speeds). This is accomplished by adding two different PHY init sequences > to the PHY driver and the UFS driver requesting the one that's required > based on the platform configuration. > > Initially the ufs-qcom driver will use the default gear G2 for enumerating > the UFS device. Afer enumeration, the max gear supported by both the > controller and device would be found out and that will be used thereafter. > But for using the max gear after enumeration, the ufs-qcom driver requires > the UFS device to be reinitialized. For this purpose, a separate quirk has > been introduced in the UFS core along with a callback and those will be used > by the ufs-qcom driver. Applied, thanks
Hello, This series adds HS-G4 support to the Qcom UFS driver and PHY driver. The newer Qcom platforms support configuring the UFS controller and PHY in dual gears (i.e., controller/PHY can be configured to run in two gear speeds). This is accomplished by adding two different PHY init sequences to the PHY driver and the UFS driver requesting the one that's required based on the platform configuration. Initially the ufs-qcom driver will use the default gear G2 for enumerating the UFS device. Afer enumeration, the max gear supported by both the controller and device would be found out and that will be used thereafter. But for using the max gear after enumeration, the ufs-qcom driver requires the UFS device to be reinitialized. For this purpose, a separate quirk has been introduced in the UFS core along with a callback and those will be used by the ufs-qcom driver. This series has been tested on following platforms: * Qcom RB5 development platform powered by SM8250 SoC * SM8450 based dev board * Qdrive3/sa8540p-ride board based on SC8280XP (derivative) Merging Strategy: ----------------- The PHY patches are expected to go through PHY tree and UFS, MAINTAINERS patches are expected to go through SCSI tree. NOTE: Since this series targets multiple SoCs (base like SM8350) and (derivative like SC8280XP), testing on all of these platforms is really appreciated. Although, if the series works for base SoC, then for derivatives also it should work. Thanks, Mani Changes in v6: * Rebased on top of phy/next * Dropped SCSI patches as they got applied Changes in v5: * Collected Review and tested-by tags * Reworded patch 18/23 (Bart) and also the comment for reinit_notify Changes in v4: * Dropped HS G3 specific setting from SM8350 default init sequence * Added G4 support to SM8350 and SC8280XP * Covered all qcom files under drivers/ufs/host in MAINTAINERS file * Added missing Suggested-by tags for Can Guo * Rebased on top of linux-next 20221201 Changes in v3: * Dropped the "device-max-gear" DT property and switched to reinitialization (Krzysztof) * Added HS-G4 support to all compatible SoCs (SM8150, SM8250 and SM8450). This will also benefit the derivative SoCs of these platforms like SC8180x, SC8280x etc... * Splitted the qmp_phy_init_tbl changes into separate patches (Vinod) * Collected reviews from Andrew H Changes in v2: * Collected reviews from Dmitry * Renamed "max-gear" property to "max-device-gear" * Used min() for deciding which gear to use instead of open comparision * Added comment about the old register name Manivannan Sadhasivam (12): phy: qcom-qmp-ufs: Remove _tbl suffix from qmp_phy_init_tbl definitions phy: qcom-qmp-ufs: Rename MSM8996 PHY definitions phy: qcom-qmp-ufs: Move register settings to qmp_phy_cfg_tbls struct phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode phy: qcom-qmp-ufs: Move HS Rate B register setting to tbls_hs_b phy: qcom-qmp-ufs: Add HS G4 mode support to SM8150 SoC phy: qcom-qmp-ufs: Add HS G4 mode support to SM8250 SoC phy: qcom-qmp-ufs: Avoid setting HS G3 specific registers phy: qcom-qmp-ufs: Add HS G4 mode support to SM8350 SoC phy: qcom-qmp-ufs: Add HS G4 mode support to SM8450 SoC phy: qcom-qmp-ufs: Add HS G4 mode support to SC8280XP SoC .../phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h | 1 + drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 454 +++++++++++++----- 2 files changed, 339 insertions(+), 116 deletions(-)