| Message ID | 20230117093533.3710000-1-quic_pkondeti@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: dts: qcom: sm8550: fix xo clock source in cpufreq-hw node | expand |
On 23-01-17 15:05:33, Pavankumar Kondeti wrote: > Currently, available frequencies for all CPUs are appearing as 2x > of the actual frequencies. Use xo clock source as bi_tcxo in the > cpufreq-hw node to fix this. Yep, it seems that way. Thanks for this! > > Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com> Tested-by: Abel Vesa <abel.vesa@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 59756ec11564..a551ded31ddf 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -2522,7 +2522,7 @@ cpufreq_hw: cpufreq@17d91000 { > <0 0x17d92000 0 0x1000>, > <0 0x17d93000 0 0x1000>; > reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; > - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > + clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>; > clock-names = "xo", "alternate"; > interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, > -- > 2.25.1 >
On 17/01/2023 10:35, Pavankumar Kondeti wrote: > Currently, available frequencies for all CPUs are appearing as 2x > of the actual frequencies. Use xo clock source as bi_tcxo in the > cpufreq-hw node to fix this. > > Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 59756ec11564..a551ded31ddf 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -2522,7 +2522,7 @@ cpufreq_hw: cpufreq@17d91000 { > <0 0x17d92000 0 0x1000>, > <0 0x17d93000 0 0x1000>; > reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; > - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > + clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>; > clock-names = "xo", "alternate"; > interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
On Tue, 17 Jan 2023 15:05:33 +0530, Pavankumar Kondeti wrote: > Currently, available frequencies for all CPUs are appearing as 2x > of the actual frequencies. Use xo clock source as bi_tcxo in the > cpufreq-hw node to fix this. > > Applied, thanks! [1/1] arm64: dts: qcom: sm8550: fix xo clock source in cpufreq-hw node commit: 66129812050b17567c3447c34f797c32a575be30 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 59756ec11564..a551ded31ddf 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2522,7 +2522,7 @@ cpufreq_hw: cpufreq@17d91000 { <0 0x17d92000 0 0x1000>, <0 0x17d93000 0 0x1000>; reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
Currently, available frequencies for all CPUs are appearing as 2x of the actual frequencies. Use xo clock source as bi_tcxo in the cpufreq-hw node to fix this. Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com> --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)