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[RFC,v2,00/11] clk: imx8mn: setup clocks from the device tree

Message ID 20230101175740.1010258-1-dario.binacchi@amarulasolutions.com (mailing list archive)
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Series clk: imx8mn: setup clocks from the device tree | expand

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Dario Binacchi Jan. 1, 2023, 5:57 p.m. UTC
The idea for this series was born back from Dublin (ELCE 2022) after
having attended the talk entitled "Updating and Modernizing Clock
Drivers" held by Chen-Yu Tsai and the availability of a board with
imx8mn SOC.

This series aims to setup all imx8mn's clocks from the device tree and
remove the legacy setup code with hardwired parameters.

I am well aware that the series lacks patches for the DT bindings. The
effort up to this point has been important and so I thought I'd ask for
feedback from the community before proceeding to implement them. If it
is positive I will add the DT binding patches starting from version 2.

The series has been tested on the BSH SystemMaster (SMM) S2 board:
https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup


Changes in v2:
- Fix compiler warnings reported by kernel test robot.

Dario Binacchi (11):
  clk: imx: add structure to extend register accesses
  clk: imx: add clk_hw based API imx_get_clk_hw_from_dt()
  clk: imx8mn: add gate driver
  clk: imx8mn: add mux driver
  clk: imx8mn: add divider driver
  clk: imx: pll14xx: add device tree support
  clk: imx: composite-8m: add device tree support
  clk: imx: gate2: add device tree support
  clk: imx: cpu: add device tree support
  arm64: dts: imx8mn: add dumy clock
  arm64: dts: imx8mn: add clocks description

 .../boot/dts/freescale/imx8mn-clocks.dtsi     | 1885 +++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mn.dtsi     |   51 +-
 drivers/clk/imx/Makefile                      |    3 +
 drivers/clk/imx/clk-composite-8m.c            |   84 +
 drivers/clk/imx/clk-cpu.c                     |   54 +
 drivers/clk/imx/clk-divider.c                 |  235 ++
 drivers/clk/imx/clk-gate.c                    |  156 ++
 drivers/clk/imx/clk-gate2.c                   |   86 +
 drivers/clk/imx/clk-imx8mn.c                  |  716 ++-----
 drivers/clk/imx/clk-mux.c                     |  258 +++
 drivers/clk/imx/clk-pll14xx.c                 |  220 +-
 drivers/clk/imx/clk.c                         |   21 +
 drivers/clk/imx/clk.h                         |   15 +
 13 files changed, 3177 insertions(+), 607 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
 create mode 100644 drivers/clk/imx/clk-divider.c
 create mode 100644 drivers/clk/imx/clk-gate.c
 create mode 100644 drivers/clk/imx/clk-mux.c

Comments

Marek Vasut Jan. 2, 2023, 11:04 p.m. UTC | #1
On 1/1/23 18:57, Dario Binacchi wrote:
> The idea for this series was born back from Dublin (ELCE 2022) after
> having attended the talk entitled "Updating and Modernizing Clock
> Drivers" held by Chen-Yu Tsai and the availability of a board with
> imx8mn SOC.
> 
> This series aims to setup all imx8mn's clocks from the device tree and
> remove the legacy setup code with hardwired parameters.
> 
> I am well aware that the series lacks patches for the DT bindings. The
> effort up to this point has been important and so I thought I'd ask for
> feedback from the community before proceeding to implement them. If it
> is positive I will add the DT binding patches starting from version 2.
> 
> The series has been tested on the BSH SystemMaster (SMM) S2 board:
> https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup

I might be wrong, but I vaguely recall AT91 (?) had this kind of massive 
clock tree description in DT and they then switched to much simpler 
clock description where the clock topology is encoded in the driver 
instead (like what iMX does right now). It might be worth having a look 
at that and the reasoning around that conversion.
Dario Binacchi Jan. 4, 2023, 4:09 p.m. UTC | #2
Hi Marek,

On Tue, Jan 3, 2023 at 12:04 AM Marek Vasut <marex@denx.de> wrote:
>
> On 1/1/23 18:57, Dario Binacchi wrote:
> > The idea for this series was born back from Dublin (ELCE 2022) after
> > having attended the talk entitled "Updating and Modernizing Clock
> > Drivers" held by Chen-Yu Tsai and the availability of a board with
> > imx8mn SOC.
> >
> > This series aims to setup all imx8mn's clocks from the device tree and
> > remove the legacy setup code with hardwired parameters.
> >
> > I am well aware that the series lacks patches for the DT bindings. The
> > effort up to this point has been important and so I thought I'd ask for
> > feedback from the community before proceeding to implement them. If it
> > is positive I will add the DT binding patches starting from version 2.
> >
> > The series has been tested on the BSH SystemMaster (SMM) S2 board:
> > https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup
>
> I might be wrong, but I vaguely recall AT91 (?) had this kind of massive
> clock tree description in DT and they then switched to much simpler
> clock description where the clock topology is encoded in the driver
> instead (like what iMX does right now). It might be worth having a look
> at that and the reasoning around that conversion.

I took inspiration from Tero Kristo's work on the clock subsystem for
TI platforms.
I think he did a great job in both device tree definition and driver
implementation.
IMHO, this way the drivers are more flexible and the code can be more easily
re-used on more platforms.

Thanks and regards,
Dario
Abel Vesa Jan. 16, 2023, 2:35 p.m. UTC | #3
On 23-01-01 18:57:40, Dario Binacchi wrote:
> The patch creates a unique node for each clock in the imx8mn clock
> control module (CCM).
> 
> To ensure backwards compatibility it was not possible to separate the
> changes to the device tree from those applied to the clocks setup code.
> In doing so, all clocks are initialized from the device tree and the
> legacy setup code with hardwired parameters is removed.
> 
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> 
> ---
> 
> (no changes since v1)
> 
>  .../boot/dts/freescale/imx8mn-clocks.dtsi     | 1885 +++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx8mn.dtsi     |   54 +-
>  drivers/clk/imx/clk-imx8mn.c                  |  714 ++-----
>  3 files changed, 2086 insertions(+), 567 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> new file mode 100644
> index 000000000000..21e02ea996d0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> @@ -0,0 +1,1885 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Device Tree Source for imx8mn clock data
> + *
> + * Copyright (c) 2022 Amarula Solutions
> + *
> + * Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +/ {
> +	osc_32k: clock-osc-32k {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <32768>;
> +		clock-output-names = "osc_32k";
> +	};
> +

[...]

> +
> +	clk_audio_pll2_bypass: clock-audio-pll2-bypass@14 {
> +		compatible = "fsl,imx8mn-mux-clock";
> +		#clock-cells = <0>;
> +		clocks = <&clk_audio_pll2>, <&clk_audio_pll2_ref_sel>;
> +		fsl,anatop = <&anatop 0x14>;
> +		fsl,bit-shift = <16>;
> +		fsl,set-rate-parent;

NACK. I'm sorry, but this creates a huge effort on maintaining the
bindings. Plus the vendor specific properties will keep increasing.

I don't think Rob and Krzysztof will be OK with this either.


> +		clock-output-names = "audio_pll2_bypass";
> +	};
> +
> +	clk_audio_pll2_out: clock-audio-pll2-out@14 {
> +		compatible = "fsl,imx8mn-gate-clock";
> +		#clock-cells = <0>;
> +		clocks = <&clk_audio_pll2_bypass>;
> +		fsl,anatop = <&anatop 0x14>;
> +		fsl,bit-shift = <13>;
> +		clock-output-names = "audio_pll2_out";
> +	};
> +

[...]

> -- 
> 2.32.0
>
Dario Binacchi Jan. 20, 2023, 5:47 p.m. UTC | #4
Hi,

On Mon, Jan 16, 2023 at 3:36 PM Abel Vesa <abel.vesa@linaro.org> wrote:
>
> On 23-01-01 18:57:40, Dario Binacchi wrote:
> > The patch creates a unique node for each clock in the imx8mn clock
> > control module (CCM).
> >
> > To ensure backwards compatibility it was not possible to separate the
> > changes to the device tree from those applied to the clocks setup code.
> > In doing so, all clocks are initialized from the device tree and the
> > legacy setup code with hardwired parameters is removed.
> >
> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> >
> > ---
> >
> > (no changes since v1)
> >
> >  .../boot/dts/freescale/imx8mn-clocks.dtsi     | 1885 +++++++++++++++++
> >  arch/arm64/boot/dts/freescale/imx8mn.dtsi     |   54 +-
> >  drivers/clk/imx/clk-imx8mn.c                  |  714 ++-----
> >  3 files changed, 2086 insertions(+), 567 deletions(-)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> > new file mode 100644
> > index 000000000000..21e02ea996d0
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi
> > @@ -0,0 +1,1885 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Device Tree Source for imx8mn clock data
> > + *
> > + * Copyright (c) 2022 Amarula Solutions
> > + *
> > + * Dario Binacchi <dario.binacchi@amarulasolutions.com>
> > + */
> > +
> > +/ {
> > +     osc_32k: clock-osc-32k {
> > +             compatible = "fixed-clock";
> > +             #clock-cells = <0>;
> > +             clock-frequency = <32768>;
> > +             clock-output-names = "osc_32k";
> > +     };
> > +
>
> [...]
>
> > +
> > +     clk_audio_pll2_bypass: clock-audio-pll2-bypass@14 {
> > +             compatible = "fsl,imx8mn-mux-clock";
> > +             #clock-cells = <0>;
> > +             clocks = <&clk_audio_pll2>, <&clk_audio_pll2_ref_sel>;
> > +             fsl,anatop = <&anatop 0x14>;
> > +             fsl,bit-shift = <16>;
> > +             fsl,set-rate-parent;
>
> NACK. I'm sorry, but this creates a huge effort on maintaining the
> bindings.

IMHO I don't think that's the point. Rather, is it correct to keep adding
platforms always replicating the same code that makes use of hardwired
parameters? When I thought about the development of this series I
thought it could be an opportunity to reverse the trend. In the direction
suggested by the linux kernel development policies.The benefits of using the
device tree have been proven for quite some time now.
The 03/11 and 04/11 patches of the series make a list of the legacy code that
has been added over time (functions with names that are sometimes unclear)
and that with the progressive use of the device tree would be removed.

As written in the cover letter, I am available to add the necessary DT
bindings to
the series.

Plus the vendor specific properties will keep increasing.
>
> I don't think Rob and Krzysztof will be OK with this either.

I hope instead that they agree with me. I didn't answer right away as
I was waiting
for their opinion. And I keep hoping for their response. And any other
recipients of
the series as well.

By the way, I add Tero Kristo and Toni Lindgren as their work done for
the TI clock
subsystem has been a great help for me in the implementation of this series.

Thanks and regards,
Dario

>
>
> > +             clock-output-names = "audio_pll2_bypass";
> > +     };
> > +
> > +     clk_audio_pll2_out: clock-audio-pll2-out@14 {
> > +             compatible = "fsl,imx8mn-gate-clock";
> > +             #clock-cells = <0>;
> > +             clocks = <&clk_audio_pll2_bypass>;
> > +             fsl,anatop = <&anatop 0x14>;
> > +             fsl,bit-shift = <13>;
> > +             clock-output-names = "audio_pll2_out";
> > +     };
> > +
>
> [...]
>
> > --
> > 2.32.0
> >
Stephen Boyd Jan. 25, 2023, 9:10 p.m. UTC | #5
Quoting Dario Binacchi (2023-01-01 09:57:29)
> The idea for this series was born back from Dublin (ELCE 2022) after
> having attended the talk entitled "Updating and Modernizing Clock
> Drivers" held by Chen-Yu Tsai and the availability of a board with
> imx8mn SOC.

Interesting. I didn't see any mention of putting clks into DT in that
presentation.

> 
> This series aims to setup all imx8mn's clocks from the device tree and
> remove the legacy setup code with hardwired parameters.

Please, no! We don't want one node per clk style of bindings.
Michael Nazzareno Trimarchi Jan. 26, 2023, 10:49 a.m. UTC | #6
Hi

On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Dario Binacchi (2023-01-01 09:57:29)
> > The idea for this series was born back from Dublin (ELCE 2022) after
> > having attended the talk entitled "Updating and Modernizing Clock
> > Drivers" held by Chen-Yu Tsai and the availability of a board with
> > imx8mn SOC.
>
> Interesting. I didn't see any mention of putting clks into DT in that
> presentation.
>
> >
> > This series aims to setup all imx8mn's clocks from the device tree and
> > remove the legacy setup code with hardwired parameters.
>
> Please, no! We don't want one node per clk style of bindings.

I think the idea behind is:
- create a way from silicon vendor to export their clock mapping with
automatic exportation
- reduce the copy and paste code across the drivers
- avoid code duplication

Is the binding a way to solve this problem? If you don't want one node
per clk style bindings, did you still think that the way
to go is totally wrong?

Michael
Stephen Boyd Feb. 10, 2023, 10:49 p.m. UTC | #7
Quoting Michael Nazzareno Trimarchi (2023-01-26 02:49:54)
> Hi
> 
> On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Dario Binacchi (2023-01-01 09:57:29)
> > > The idea for this series was born back from Dublin (ELCE 2022) after
> > > having attended the talk entitled "Updating and Modernizing Clock
> > > Drivers" held by Chen-Yu Tsai and the availability of a board with
> > > imx8mn SOC.
> >
> > Interesting. I didn't see any mention of putting clks into DT in that
> > presentation.
> >
> > >
> > > This series aims to setup all imx8mn's clocks from the device tree and
> > > remove the legacy setup code with hardwired parameters.
> >
> > Please, no! We don't want one node per clk style of bindings.
> 
> I think the idea behind is:
> - create a way from silicon vendor to export their clock mapping with
> automatic exportation

I suspect silicon vendors automatically generate their clk drivers
today.

> - reduce the copy and paste code across the drivers
> - avoid code duplication

Code duplication should be avoided. Surely the clk_ops is shared? Data
duplication is the real problem here. The status quo has been to have
data descriptions of clks in drivers so that drivers can turn them on.
If we're trying to avoid bloat then we only enable the drivers that we
care about, or make them modular so they don't waste kernel memory.

If you have ideas on how to avoid duplication there then by all means
implement them. Don't move the data duplication problem to devicetree
though.

I've been wondering if we can tag drivers that are compiled into the
kernel as freeable if they aren't ever going to probe because they're
for some SoC that isn't present. That would allow us to shed various
builtin clk drivers on systems instead of forcing us to make everything
a module.

> 
> Is the binding a way to solve this problem?

Don't think so.

> If you don't want one node
> per clk style bindings, did you still think that the way
> to go is totally wrong?

Yes.
Michael Nazzareno Trimarchi Feb. 11, 2023, 9:19 a.m. UTC | #8
Hi

On Fri, Feb 10, 2023 at 11:49 PM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Michael Nazzareno Trimarchi (2023-01-26 02:49:54)
> > Hi
> >
> > On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote:
> > >
> > > Quoting Dario Binacchi (2023-01-01 09:57:29)
> > > > The idea for this series was born back from Dublin (ELCE 2022) after
> > > > having attended the talk entitled "Updating and Modernizing Clock
> > > > Drivers" held by Chen-Yu Tsai and the availability of a board with
> > > > imx8mn SOC.
> > >
> > > Interesting. I didn't see any mention of putting clks into DT in that
> > > presentation.
> > >
> > > >
> > > > This series aims to setup all imx8mn's clocks from the device tree and
> > > > remove the legacy setup code with hardwired parameters.
> > >
> > > Please, no! We don't want one node per clk style of bindings.
> >
> > I think the idea behind is:
> > - create a way from silicon vendor to export their clock mapping with
> > automatic exportation
>
> I suspect silicon vendors automatically generate their clk drivers
> today.
>

Was easy to think that creating tools for dts generation was easy to
have because
they don't depend on the internal linux kernel and they are formally
described. Export
clk drivers considering kernel internal change I don't think that can work.

> > - reduce the copy and paste code across the drivers
> > - avoid code duplication
>
> Code duplication should be avoided. Surely the clk_ops is shared? Data
> duplication is the real problem here. The status quo has been to have

The idea to have in dts was to have much less code by the end to handle
different SoC vendors but as you pointed me seems that you are more
concerned about data duplication.

> data descriptions of clks in drivers so that drivers can turn them on.
> If we're trying to avoid bloat then we only enable the drivers that we
> care about, or make them modular so they don't waste kernel memory.
>

I'm not an expert of the dtc compiler but, is that possible that some
optimization
can happen there in the feature?

> If you have ideas on how to avoid duplication there then by all means
> implement them. Don't move the data duplication problem to devicetree
> though.
>

We will sit together again ;) after your comments here

> I've been wondering if we can tag drivers that are compiled into the
> kernel as freeable if they aren't ever going to probe because they're
> for some SoC that isn't present. That would allow us to shed various
> builtin clk drivers on systems instead of forcing us to make everything
> a module.

This is general on the driver level but sounds like a good idea.

Michael

>
> >
> > Is the binding a way to solve this problem?
>
> Don't think so.
>
> > If you don't want one node
> > per clk style bindings, did you still think that the way
> > to go is totally wrong?
>
> Yes.