| Message ID | 20230111074528.29354-2-roger.lu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enahance SVS's robustness | expand |
On 11/01/2023 08:45, Roger Lu wrote: > If svs init02 fail, it means we cannot rely on svs bank voltages anymore. > We need to disable svs function and restore DVFS opp voltages back to the > default voltages for making sure we have enough DVFS voltages. > > Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") > Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver") > Signed-off-by: Roger Lu <roger.lu@mediatek.com> Applied, thanks! > --- > drivers/soc/mediatek/mtk-svs.c | 24 ++++++++++++++++++++++-- > 1 file changed, 22 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c > index 0469c9dfeb04..2df30a6bca28 100644 > --- a/drivers/soc/mediatek/mtk-svs.c > +++ b/drivers/soc/mediatek/mtk-svs.c > @@ -1461,6 +1461,7 @@ static int svs_init02(struct svs_platform *svsp) > { > struct svs_bank *svsb; > unsigned long flags, time_left; > + int ret; > u32 idx; > > for (idx = 0; idx < svsp->bank_max; idx++) { > @@ -1479,7 +1480,8 @@ static int svs_init02(struct svs_platform *svsp) > msecs_to_jiffies(5000)); > if (!time_left) { > dev_err(svsb->dev, "init02 completion timeout\n"); > - return -EBUSY; > + ret = -EBUSY; > + goto out_of_init02; > } > } > > @@ -1497,12 +1499,30 @@ static int svs_init02(struct svs_platform *svsp) > if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) { > if (svs_sync_bank_volts_from_opp(svsb)) { > dev_err(svsb->dev, "sync volt fail\n"); > - return -EPERM; > + ret = -EPERM; > + goto out_of_init02; > } > } > } > > return 0; > + > +out_of_init02: > + for (idx = 0; idx < svsp->bank_max; idx++) { > + svsb = &svsp->banks[idx]; > + > + spin_lock_irqsave(&svs_lock, flags); > + svsp->pbank = svsb; > + svs_switch_bank(svsp); > + svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); > + svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); > + spin_unlock_irqrestore(&svs_lock, flags); > + > + svsb->phase = SVSB_PHASE_ERROR; > + svs_adjust_pm_opp_volts(svsb); > + } > + > + return ret; > } > > static void svs_mon_mode(struct svs_platform *svsp)
diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 0469c9dfeb04..2df30a6bca28 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1461,6 +1461,7 @@ static int svs_init02(struct svs_platform *svsp) { struct svs_bank *svsb; unsigned long flags, time_left; + int ret; u32 idx; for (idx = 0; idx < svsp->bank_max; idx++) { @@ -1479,7 +1480,8 @@ static int svs_init02(struct svs_platform *svsp) msecs_to_jiffies(5000)); if (!time_left) { dev_err(svsb->dev, "init02 completion timeout\n"); - return -EBUSY; + ret = -EBUSY; + goto out_of_init02; } } @@ -1497,12 +1499,30 @@ static int svs_init02(struct svs_platform *svsp) if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) { if (svs_sync_bank_volts_from_opp(svsb)) { dev_err(svsb->dev, "sync volt fail\n"); - return -EPERM; + ret = -EPERM; + goto out_of_init02; } } } return 0; + +out_of_init02: + for (idx = 0; idx < svsp->bank_max; idx++) { + svsb = &svsp->banks[idx]; + + spin_lock_irqsave(&svs_lock, flags); + svsp->pbank = svsb; + svs_switch_bank(svsp); + svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); + svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); + spin_unlock_irqrestore(&svs_lock, flags); + + svsb->phase = SVSB_PHASE_ERROR; + svs_adjust_pm_opp_volts(svsb); + } + + return ret; } static void svs_mon_mode(struct svs_platform *svsp)
If svs init02 fail, it means we cannot rely on svs bank voltages anymore. We need to disable svs function and restore DVFS opp voltages back to the default voltages for making sure we have enough DVFS voltages. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver") Signed-off-by: Roger Lu <roger.lu@mediatek.com> --- drivers/soc/mediatek/mtk-svs.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-)