| Message ID | 1675700201-12890-5-git-send-email-quic_srivasam@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add SC7280 audioreach device tree nodes | expand |
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Update VA, RX and TX macro and lpass_tlmm clock properties and > enable them. Please explain why power domains have to be disabled here and not in SoC DTSI. I still do not get why these clocks are not inputs for every case - also non-AudioReach. The hardware is the same... > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > index 5e99f49..9b04491 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > @@ -108,6 +108,43 @@ > }; > }; > > +&lpass_rx_macro { > + /delete-property/ power-domains; > + /delete-property/ power-domain-names; Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 5e99f49..9b04491 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -108,6 +108,43 @@ }; }; +&lpass_rx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + status = "okay"; +}; + +&lpass_tx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + status = "okay"; +}; + +&lpass_va_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + + clock-names = "mclk", "macro", "dcodec"; + status = "okay"; +}; + &remoteproc_adsp { status = "okay"; };