| Message ID | 1676311911-1952-1-git-send-email-Sanju.Mehta@amd.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3] thunderbolt: Add quirk to disable CLx | expand |
Hi, On Mon, Feb 13, 2023 at 12:11:51PM -0600, Sanjay R Mehta wrote: > From: Sanjay R Mehta <sanju.mehta@amd.com> > > Add QUIRK_NO_CLX to disable the CLx state for hardware which > doesn't supports it. > > AMD Yellow Carp and Pink Sardine don't support CLx state, > hence disabling it using QUIRK_NO_CLX. > > Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> > Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> > --- > drivers/thunderbolt/quirks.c | 19 +++++++++++++++++-- > drivers/thunderbolt/tb.h | 11 ++++++++--- > 2 files changed, 25 insertions(+), 5 deletions(-) > > diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c > index b5f2ec7..47ff4b8 100644 > --- a/drivers/thunderbolt/quirks.c > +++ b/drivers/thunderbolt/quirks.c > @@ -20,6 +20,11 @@ static void quirk_dp_credit_allocation(struct tb_switch *sw) > } > } > > +static void quirk_clx_disable(struct tb_switch *sw) > +{ > + sw->quirks |= QUIRK_NO_CLX; > +} > + > struct tb_quirk { > u16 hw_vendor_id; > u16 hw_device_id; > @@ -37,6 +42,13 @@ static const struct tb_quirk tb_quirks[] = { > * DP buffers. > */ > { 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation }, > + /* > + * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms. > + */ > + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162e, quirk_clx_disable }, > + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162f, quirk_clx_disable }, > + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1668, quirk_clx_disable }, > + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1669, quirk_clx_disable }, > }; > > /** > @@ -47,6 +59,7 @@ static const struct tb_quirk tb_quirks[] = { > */ > void tb_check_quirks(struct tb_switch *sw) > { > + struct tb_nhi *nhi = sw->tb->nhi; > int i; > > for (i = 0; i < ARRAY_SIZE(tb_quirks); i++) { > @@ -56,9 +69,11 @@ void tb_check_quirks(struct tb_switch *sw) > continue; > if (q->hw_device_id && q->hw_device_id != sw->config.device_id) > continue; > - if (q->vendor && q->vendor != sw->vendor) > + if (q->vendor && (q->vendor != sw->vendor && > + q->vendor != nhi->pdev->vendor)) Can't you use the router ID here not the NHI PCI ID? > continue; > - if (q->device && q->device != sw->device) > + if (q->device && (q->device != sw->device && > + q->device != nhi->pdev->device)) Ditto here.
On 2/14/2023 11:13 AM, Mika Westerberg wrote: > Hi, > > On Mon, Feb 13, 2023 at 12:11:51PM -0600, Sanjay R Mehta wrote: >> From: Sanjay R Mehta <sanju.mehta@amd.com> >> >> Add QUIRK_NO_CLX to disable the CLx state for hardware which >> doesn't supports it. >> >> AMD Yellow Carp and Pink Sardine don't support CLx state, >> hence disabling it using QUIRK_NO_CLX. >> >> Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> >> Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> >> --- >> drivers/thunderbolt/quirks.c | 19 +++++++++++++++++-- >> drivers/thunderbolt/tb.h | 11 ++++++++--- >> 2 files changed, 25 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c >> index b5f2ec7..47ff4b8 100644 >> --- a/drivers/thunderbolt/quirks.c >> +++ b/drivers/thunderbolt/quirks.c >> @@ -20,6 +20,11 @@ static void quirk_dp_credit_allocation(struct tb_switch *sw) >> } >> } >> >> +static void quirk_clx_disable(struct tb_switch *sw) >> +{ >> + sw->quirks |= QUIRK_NO_CLX; >> +} >> + >> struct tb_quirk { >> u16 hw_vendor_id; >> u16 hw_device_id; >> @@ -37,6 +42,13 @@ static const struct tb_quirk tb_quirks[] = { >> * DP buffers. >> */ >> { 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation }, >> + /* >> + * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms. >> + */ >> + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162e, quirk_clx_disable }, >> + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162f, quirk_clx_disable }, >> + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1668, quirk_clx_disable }, >> + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1669, quirk_clx_disable }, >> }; >> >> /** >> @@ -47,6 +59,7 @@ static const struct tb_quirk tb_quirks[] = { >> */ >> void tb_check_quirks(struct tb_switch *sw) >> { >> + struct tb_nhi *nhi = sw->tb->nhi; >> int i; >> >> for (i = 0; i < ARRAY_SIZE(tb_quirks); i++) { >> @@ -56,9 +69,11 @@ void tb_check_quirks(struct tb_switch *sw) >> continue; >> if (q->hw_device_id && q->hw_device_id != sw->config.device_id) >> continue; >> - if (q->vendor && q->vendor != sw->vendor) >> + if (q->vendor && (q->vendor != sw->vendor && >> + q->vendor != nhi->pdev->vendor)) > > Can't you use the router ID here not the NHI PCI ID? > Thanks Mika. I have changed this as per your suggestion as part V5. pls ignore v4 as it was sent incorrectly. >> continue; >> - if (q->device && q->device != sw->device) >> + if (q->device && (q->device != sw->device && >> + q->device != nhi->pdev->device)) > > Ditto here.
diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c index b5f2ec7..47ff4b8 100644 --- a/drivers/thunderbolt/quirks.c +++ b/drivers/thunderbolt/quirks.c @@ -20,6 +20,11 @@ static void quirk_dp_credit_allocation(struct tb_switch *sw) } } +static void quirk_clx_disable(struct tb_switch *sw) +{ + sw->quirks |= QUIRK_NO_CLX; +} + struct tb_quirk { u16 hw_vendor_id; u16 hw_device_id; @@ -37,6 +42,13 @@ static const struct tb_quirk tb_quirks[] = { * DP buffers. */ { 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation }, + /* + * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms. + */ + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162e, quirk_clx_disable }, + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x162f, quirk_clx_disable }, + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1668, quirk_clx_disable }, + { 0x0000, 0x0000, PCI_VENDOR_ID_AMD, 0x1669, quirk_clx_disable }, }; /** @@ -47,6 +59,7 @@ static const struct tb_quirk tb_quirks[] = { */ void tb_check_quirks(struct tb_switch *sw) { + struct tb_nhi *nhi = sw->tb->nhi; int i; for (i = 0; i < ARRAY_SIZE(tb_quirks); i++) { @@ -56,9 +69,11 @@ void tb_check_quirks(struct tb_switch *sw) continue; if (q->hw_device_id && q->hw_device_id != sw->config.device_id) continue; - if (q->vendor && q->vendor != sw->vendor) + if (q->vendor && (q->vendor != sw->vendor && + q->vendor != nhi->pdev->vendor)) continue; - if (q->device && q->device != sw->device) + if (q->device && (q->device != sw->device && + q->device != nhi->pdev->device)) continue; q->hook(sw); diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index f978697..206759a 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -23,6 +23,11 @@ #define NVM_MAX_SIZE SZ_512K #define NVM_DATA_DWORDS 16 +/* Keep link controller awake during update */ +#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) +/* Disable CLx if not supported */ +#define QUIRK_NO_CLX BIT(1) + /** * struct tb_nvm - Structure holding NVM information * @dev: Owner of the NVM @@ -997,6 +1002,9 @@ static inline bool tb_switch_is_clx_enabled(const struct tb_switch *sw, */ static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw) { + if (sw->quirks & QUIRK_NO_CLX) + return false; + return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw); } @@ -1254,9 +1262,6 @@ struct usb4_port *usb4_port_device_add(struct tb_port *port); void usb4_port_device_remove(struct usb4_port *usb4); int usb4_port_device_resume(struct usb4_port *usb4); -/* Keep link controller awake during update */ -#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) - void tb_check_quirks(struct tb_switch *sw); #ifdef CONFIG_ACPI