| Message ID | 20230213215619.1362566-3-quic_bjorande@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: qcom: sc8280xp: Enable external display | expand |
On Mon, Feb 13, 2023 at 01:56:17PM -0800, Bjorn Andersson wrote: > From: Bjorn Andersson <bjorn.andersson@linaro.org> > > The SC8280XP CRD control over battery management and its two USB Type-C > port using pmic_glink and two GPIO-based SBU muxes. > > Enable the two DisplayPort instances, GPIO SBU mux instance and > pmic_glink with the two connectors on the CRD. > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > > Changes since v3: > - Moved data-lanes into dp/port/endpoint > - Moved dp/port/endpoint definition to sc8280xp.dtsi, and reference by > label - to avoid repeating structure in the dts > > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 196 +++++++++++++++++++++- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 17 ++ > 2 files changed, 211 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > index 2179c06b4e3b..98a0f1f9f01e 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > @@ -36,6 +36,84 @@ chosen { > stdout-path = "serial0:115200n8"; > }; > > + pmic-glink { > + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + connector@0 { > + compatible = "usb-c-connector"; > + reg = <0>; > + power-role = "dual"; > + data-role = "dual"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + pmic_glink_con0_hs: endpoint { > + remote-endpoint = <&usb_0_role_switch>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + pmic_glink_con0_ss: endpoint { > + remote-endpoint = <&mdss0_dp0_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_con0_sbu: endpoint { > + remote-endpoint = <&usb0_sbu_mux>; > + }; > + }; > + }; > + }; > + > + connector@1 { > + compatible = "usb-c-connector"; > + reg = <1>; > + power-role = "dual"; > + data-role = "dual"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; Nit: add a newline for consistency > + port@0 { > + reg = <0>; > + > + pmic_glink_con1_hs: endpoint { > + remote-endpoint = <&usb_1_role_switch>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + pmic_glink_con1_ss: endpoint { > + remote-endpoint = <&mdss0_dp1_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_con1_sbu: endpoint { > + remote-endpoint = <&usb1_sbu_mux>; > + }; > + }; > + }; > + }; > + }; > + > vreg_edp_3p3: regulator-edp-3p3 { > compatible = "regulator-fixed"; > @@ -262,6 +380,24 @@ &mdss0 { > status = "okay"; > }; > > +&mdss0_dp0 { > + status = "okay"; > +}; > + > +&mdss0_dp0_out { > + data-lanes = <0 1>; This does not work as the drm driver expects 'data-lanes' to be defined in the controller node where you had it in the previous versions: [ 6.669325] [drm] Invalid property "data-lanes", default max DP lanes = 4 Moving it to the endpoint nodes would require updating both binding and driver it seems. > + remote-endpoint = <&pmic_glink_con0_ss>; > +}; > + > +&mdss0_dp1 { > + status = "okay"; > +}; > + > +&mdss0_dp1_out { > + data-lanes = <0 1>; Same here (and for X13s). > + remote-endpoint = <&pmic_glink_con1_ss>; > +}; > + > &mdss0_dp3 { > compatible = "qcom,sc8280xp-edp"; > /delete-property/ #sound-dai-cells; Johan
On Wed, Feb 15, 2023 at 10:47:40AM +0100, Johan Hovold wrote: > On Mon, Feb 13, 2023 at 01:56:17PM -0800, Bjorn Andersson wrote: [..] > > +&mdss0_dp0_out { > > + data-lanes = <0 1>; > > This does not work as the drm driver expects 'data-lanes' to be defined > in the controller node where you had it in the previous versions: > > [ 6.669325] [drm] Invalid property "data-lanes", default max DP lanes = 4 > > Moving it to the endpoint nodes would require updating both binding and > driver it seems. > I will go back and double-check, but this should be taken care of in d25cfeeec064 ("drm/msm/dp: parse data-lanes as property of dp_out endpoint"). Regards, Bjorn
On Wed, Feb 15, 2023 at 09:23:47AM -0800, Bjorn Andersson wrote: > On Wed, Feb 15, 2023 at 10:47:40AM +0100, Johan Hovold wrote: > > On Mon, Feb 13, 2023 at 01:56:17PM -0800, Bjorn Andersson wrote: > [..] > > > +&mdss0_dp0_out { > > > + data-lanes = <0 1>; > > > > This does not work as the drm driver expects 'data-lanes' to be defined > > in the controller node where you had it in the previous versions: > > > > [ 6.669325] [drm] Invalid property "data-lanes", default max DP lanes = 4 > > > > Moving it to the endpoint nodes would require updating both binding and > > driver it seems. > > > > I will go back and double-check, but this should be taken care of in > d25cfeeec064 ("drm/msm/dp: parse data-lanes as property of dp_out > endpoint"). That indeed seems to be the case. Sorry about the noise. I'll just carry the fixes I posted for my sc8280xp 6.2 branches. Johan
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 2179c06b4e3b..98a0f1f9f01e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -36,6 +36,84 @@ chosen { stdout-path = "serial0:115200n8"; }; + pmic-glink { + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_con0_hs: endpoint { + remote-endpoint = <&usb_0_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con0_ss: endpoint { + remote-endpoint = <&mdss0_dp0_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + pmic_glink_con1_hs: endpoint { + remote-endpoint = <&usb_1_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con1_ss: endpoint { + remote-endpoint = <&mdss0_dp1_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + vreg_edp_3p3: regulator-edp-3p3 { compatible = "regulator-fixed"; @@ -139,6 +217,46 @@ linux,cma { linux,cma-default; }; }; + + usb0-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb0_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb1_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con1_sbu>; + }; + }; + }; }; &apps_rsc { @@ -262,6 +380,24 @@ &mdss0 { status = "okay"; }; +&mdss0_dp0 { + status = "okay"; +}; + +&mdss0_dp0_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con0_ss>; +}; + +&mdss0_dp1 { + status = "okay"; +}; + +&mdss0_dp1_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con1_ss>; +}; + &mdss0_dp3 { compatible = "qcom,sc8280xp-edp"; /delete-property/ #sound-dai-cells; @@ -480,7 +616,6 @@ &usb_0 { }; &usb_0_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -499,12 +634,15 @@ &usb_0_qmpphy { status = "okay"; }; +&usb_0_role_switch { + remote-endpoint = <&pmic_glink_con0_hs>; +}; + &usb_1 { status = "okay"; }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -523,6 +661,10 @@ &usb_1_qmpphy { status = "okay"; }; +&usb_1_role_switch { + remote-endpoint = <&pmic_glink_con1_hs>; +}; + &xo_board_clk { clock-frequency = <38400000>; }; @@ -709,4 +851,54 @@ reset-n-pins { drive-strength = <16>; }; }; + + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins = "gpio101"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio164"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio167"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins = "gpio48"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio47"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio50"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 92d5b5e21e50..0d02599d8867 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 { iommus = <&apps_smmu 0x820 0x0>; phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + port { + usb_0_role_switch: endpoint { + }; + }; }; }; @@ -3095,6 +3100,11 @@ usb_1_dwc3: usb@a800000 { iommus = <&apps_smmu 0x860 0x0>; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + port { + usb_1_role_switch: endpoint { + }; + }; }; }; @@ -3253,6 +3263,7 @@ ports { port@0 { reg = <0>; + mdss0_dp0_in: endpoint { remote-endpoint = <&mdss0_intf0_out>; }; @@ -3260,6 +3271,9 @@ mdss0_dp0_in: endpoint { port@1 { reg = <1>; + + mdss0_dp0_out: endpoint { + }; }; }; @@ -3335,6 +3349,9 @@ mdss0_dp1_in: endpoint { port@1 { reg = <1>; + + mdss0_dp1_out: endpoint { + }; }; };