| Message ID | 20230215062544.8677-6-yong.wu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Adjust the dma-ranges for MTK IOMMU | expand |
Il 15/02/23 07:25, Yong Wu ha scritto: > Add iova_region_larb_msk for mt8192. We separate the 16GB iova regions > by each device's larbid/portid. > Note: larb3/6/8/10/12/15 connect nothing in this SoC. > Refer to the comment in include/dt-bindings/memory/mt8192-larb-port.h > > Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate > the index of mt8xxx_larb_region_msk and > "struct mtk_iommu_iova_region mt8192_multi_dom" > are the same. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> P.S.: I'm sorry for the step-by-step review and making you send multiple versions, I feel this can be tedious sometimes but - at times - this is the only way to make sure that the code is as "beautiful" and bug-free as possible! Cheers!
On Wed, 2023-02-15 at 13:33 +0100, AngeloGioacchino Del Regno wrote: > Il 15/02/23 07:25, Yong Wu ha scritto: > > Add iova_region_larb_msk for mt8192. We separate the 16GB iova > > regions > > by each device's larbid/portid. > > Note: larb3/6/8/10/12/15 connect nothing in this SoC. > > Refer to the comment in include/dt-bindings/memory/mt8192-larb- > > port.h > > > > Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate > > the index of mt8xxx_larb_region_msk and > > "struct mtk_iommu_iova_region mt8192_multi_dom" > > are the same. > > > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > > P.S.: I'm sorry for the step-by-step review and making you send > multiple versions, > I feel this can be tedious sometimes but - at times - this is > the only way > to make sure that the code is as "beautiful" and bug-free as > possible! You are too kind. This should be all we need to thank you for always help us with a careful review, every clear and careful reply benefit us a lot. Many thanks. > > Cheers!
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 89a80982b7d1..710a3239fd3d 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -336,7 +336,12 @@ static const struct mtk_iommu_iova_region single_domain[] = { {.iova_base = 0, .size = SZ_4G}, }; -static const struct mtk_iommu_iova_region mt8192_multi_dom[] = { +#define MT8192_MULTI_REGION_NR_MAX 6 + +#define MT8192_MULTI_REGION_NR (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) ? \ + MT8192_MULTI_REGION_NR_MAX : 1) + +static const struct mtk_iommu_iova_region mt8192_multi_dom[MT8192_MULTI_REGION_NR] = { { .iova_base = 0x0, .size = SZ_4G}, /* 0 ~ 4G */ #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) { .iova_base = SZ_4G, .size = SZ_4G}, /* 4G ~ 8G */ @@ -1538,6 +1543,17 @@ static const struct mtk_iommu_plat_data mt8186_data_mm = { .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), }; +static const unsigned int mt8192_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = { + [0] = {~0, ~0}, /* Region0: larb0/1 */ + [1] = {0, 0, 0, 0, ~0, ~0, 0, ~0}, /* Region1: larb4/5/7 */ + [2] = {0, 0, ~0, 0, 0, 0, 0, 0, /* Region2: larb2/9/11/13/14/16/17/18/19/20 */ + 0, ~0, 0, ~0, 0, ~(u32)(BIT(9) | BIT(10)), ~(u32)(BIT(4) | BIT(5)), 0, + ~0, ~0, ~0, ~0, ~0}, + [3] = {0}, + [4] = {[13] = BIT(9) | BIT(10)}, /* larb13 port9/10 */ + [5] = {[14] = BIT(4) | BIT(5)}, /* larb14 port4/5 */ +}; + static const struct mtk_iommu_plat_data mt8192_data = { .m4u_plat = M4U_MT8192, .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | @@ -1547,6 +1563,7 @@ static const struct mtk_iommu_plat_data mt8192_data = { .banks_enable = {true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), + .iova_region_larb_msk = mt8192_larb_region_msk, .larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20}, {0, 14, 16}, {0, 13, 18, 17}}, };
Add iova_region_larb_msk for mt8192. We separate the 16GB iova regions by each device's larbid/portid. Note: larb3/6/8/10/12/15 connect nothing in this SoC. Refer to the comment in include/dt-bindings/memory/mt8192-larb-port.h Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate the index of mt8xxx_larb_region_msk and "struct mtk_iommu_iova_region mt8192_multi_dom" are the same. Signed-off-by: Yong Wu <yong.wu@mediatek.com> --- drivers/iommu/mtk_iommu.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)