Message ID | 20230222092543.19187-34-angelogioacchino.delregno@collabora.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | MediaTek clocks: full module build and cleanups | expand |
On Wed, Feb 22, 2023 at 10:25:22AM +0100, AngeloGioacchino Del Regno wrote: > Convert this driver to use the common mtk_clk_simple_probe() mechanism. > While at it, also use module_platform_driver() instead, as this driver > just gained a .remove() callback during the conversion. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> (on BananaPi BPi-R3) > --- > drivers/clk/mediatek/clk-mt7986-infracfg.c | 61 ++++++---------------- > 1 file changed, 17 insertions(+), 44 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mt7986-infracfg.c b/drivers/clk/mediatek/clk-mt7986-infracfg.c > index 0a4bf87ee160..0299faad0733 100644 > --- a/drivers/clk/mediatek/clk-mt7986-infracfg.c > +++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c > @@ -157,57 +157,30 @@ static const struct mtk_gate infra_clks[] = { > GATE_INFRA2(CLK_INFRA_IPCIEB_CK, "infra_ipcieb", "sysaxi_sel", 15), > }; > > -static int clk_mt7986_infracfg_probe(struct platform_device *pdev) > -{ > - struct clk_hw_onecell_data *clk_data; > - struct device_node *node = pdev->dev.of_node; > - int r; > - void __iomem *base; > - int nr = ARRAY_SIZE(infra_divs) + ARRAY_SIZE(infra_muxes) + > - ARRAY_SIZE(infra_clks); > - > - base = of_iomap(node, 0); > - if (!base) { > - pr_err("%s(): ioremap failed\n", __func__); > - return -ENOMEM; > - } > - > - clk_data = mtk_alloc_clk_data(nr); > - > - if (!clk_data) > - return -ENOMEM; > - > - mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); > - mtk_clk_register_muxes(&pdev->dev, infra_muxes, > - ARRAY_SIZE(infra_muxes), node, > - &mt7986_clk_lock, clk_data); > - mtk_clk_register_gates(&pdev->dev, node, infra_clks, > - ARRAY_SIZE(infra_clks), clk_data); > - > - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > - if (r) { > - pr_err("%s(): could not register clock provider: %d\n", > - __func__, r); > - goto free_infracfg_data; > - } > - return r; > - > -free_infracfg_data: > - mtk_free_clk_data(clk_data); > - return r; > - > -} > +static const struct mtk_clk_desc infra_desc = { > + .clks = infra_clks, > + .num_clks = ARRAY_SIZE(infra_clks), > + .factor_clks = infra_divs, > + .num_factor_clks = ARRAY_SIZE(infra_divs), > + .mux_clks = infra_muxes, > + .num_mux_clks = ARRAY_SIZE(infra_muxes), > + .clk_lock = &mt7986_clk_lock, > +}; > > static const struct of_device_id of_match_clk_mt7986_infracfg[] = { > - { .compatible = "mediatek,mt7986-infracfg", }, > - {} > + { .compatible = "mediatek,mt7986-infracfg", .data = &infra_desc }, > + { /* sentinel */ } > }; > > static struct platform_driver clk_mt7986_infracfg_drv = { > - .probe = clk_mt7986_infracfg_probe, > .driver = { > .name = "clk-mt7986-infracfg", > .of_match_table = of_match_clk_mt7986_infracfg, > }, > + .probe = mtk_clk_simple_probe, > + .remove = mtk_clk_simple_remove, > }; > -builtin_platform_driver(clk_mt7986_infracfg_drv); > +module_platform_driver(clk_mt7986_infracfg_drv); > + > +MODULE_DESCRIPTION("MediaTek MT7986 infracfg clocks driver"); > +MODULE_LICENSE("GPL"); > -- > 2.39.2 > >
diff --git a/drivers/clk/mediatek/clk-mt7986-infracfg.c b/drivers/clk/mediatek/clk-mt7986-infracfg.c index 0a4bf87ee160..0299faad0733 100644 --- a/drivers/clk/mediatek/clk-mt7986-infracfg.c +++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c @@ -157,57 +157,30 @@ static const struct mtk_gate infra_clks[] = { GATE_INFRA2(CLK_INFRA_IPCIEB_CK, "infra_ipcieb", "sysaxi_sel", 15), }; -static int clk_mt7986_infracfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node = pdev->dev.of_node; - int r; - void __iomem *base; - int nr = ARRAY_SIZE(infra_divs) + ARRAY_SIZE(infra_muxes) + - ARRAY_SIZE(infra_clks); - - base = of_iomap(node, 0); - if (!base) { - pr_err("%s(): ioremap failed\n", __func__); - return -ENOMEM; - } - - clk_data = mtk_alloc_clk_data(nr); - - if (!clk_data) - return -ENOMEM; - - mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); - mtk_clk_register_muxes(&pdev->dev, infra_muxes, - ARRAY_SIZE(infra_muxes), node, - &mt7986_clk_lock, clk_data); - mtk_clk_register_gates(&pdev->dev, node, infra_clks, - ARRAY_SIZE(infra_clks), clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) { - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - goto free_infracfg_data; - } - return r; - -free_infracfg_data: - mtk_free_clk_data(clk_data); - return r; - -} +static const struct mtk_clk_desc infra_desc = { + .clks = infra_clks, + .num_clks = ARRAY_SIZE(infra_clks), + .factor_clks = infra_divs, + .num_factor_clks = ARRAY_SIZE(infra_divs), + .mux_clks = infra_muxes, + .num_mux_clks = ARRAY_SIZE(infra_muxes), + .clk_lock = &mt7986_clk_lock, +}; static const struct of_device_id of_match_clk_mt7986_infracfg[] = { - { .compatible = "mediatek,mt7986-infracfg", }, - {} + { .compatible = "mediatek,mt7986-infracfg", .data = &infra_desc }, + { /* sentinel */ } }; static struct platform_driver clk_mt7986_infracfg_drv = { - .probe = clk_mt7986_infracfg_probe, .driver = { .name = "clk-mt7986-infracfg", .of_match_table = of_match_clk_mt7986_infracfg, }, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, }; -builtin_platform_driver(clk_mt7986_infracfg_drv); +module_platform_driver(clk_mt7986_infracfg_drv); + +MODULE_DESCRIPTION("MediaTek MT7986 infracfg clocks driver"); +MODULE_LICENSE("GPL");