| Message ID | 20230222092543.19187-54-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MediaTek clocks: full module build and cleanups | expand |
On Wed, Feb 22, 2023 at 5:27 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > In preparation for converting this driver to the common simple probe > mechanism, join the root_clk_alias and top_divs mtk_fixed_factor > arrays. > > This commit brings no functional change. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> > --- > drivers/clk/mediatek/clk-mt8135.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c > index 1c76c0003f99..8785d58cb3a5 100644 > --- a/drivers/clk/mediatek/clk-mt8135.c > +++ b/drivers/clk/mediatek/clk-mt8135.c > @@ -2,8 +2,6 @@ > /* > * Copyright (c) 2014 MediaTek Inc. > * Author: James Liao <jamesjj.liao@mediatek.com> > - * Copyright (c) 2023 Collabora, Ltd. > - * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Was this meant for some other patch? Also this is the first patch where my MT8186 fails to boot, which makes absolutely no sense, since the MT8135 driver isn't even built. ChenYu > */ > > #include <linux/clk.h> > @@ -19,14 +17,12 @@ > > static DEFINE_SPINLOCK(mt8135_clk_lock); > > -static const struct mtk_fixed_factor root_clk_alias[] __initconst = { > +static const struct mtk_fixed_factor top_divs[] __initconst = { > FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1), > FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1), > FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1), > FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1), > -}; > > -static const struct mtk_fixed_factor top_divs[] __initconst = { > FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2), > FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3), > FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5), > @@ -534,7 +530,6 @@ static void __init mtk_topckgen_init(struct device_node *node) > > clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); > > - mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data); > mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); > mtk_clk_register_composites(NULL, top_muxes, > ARRAY_SIZE(top_muxes), base, > -- > 2.39.2 >
diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c index 1c76c0003f99..8785d58cb3a5 100644 --- a/drivers/clk/mediatek/clk-mt8135.c +++ b/drivers/clk/mediatek/clk-mt8135.c @@ -2,8 +2,6 @@ /* * Copyright (c) 2014 MediaTek Inc. * Author: James Liao <jamesjj.liao@mediatek.com> - * Copyright (c) 2023 Collabora, Ltd. - * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> */ #include <linux/clk.h> @@ -19,14 +17,12 @@ static DEFINE_SPINLOCK(mt8135_clk_lock); -static const struct mtk_fixed_factor root_clk_alias[] __initconst = { +static const struct mtk_fixed_factor top_divs[] __initconst = { FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1), FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1), FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1), FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1), -}; -static const struct mtk_fixed_factor top_divs[] __initconst = { FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2), FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3), FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5), @@ -534,7 +530,6 @@ static void __init mtk_topckgen_init(struct device_node *node) clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); - mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_composites(NULL, top_muxes, ARRAY_SIZE(top_muxes), base,