[-next,v14,01/19] riscv: Rename __switch_to_aux -> fpu

Message ID	20230224170118.16766-2-andy.chiu@sifive.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Andy Chiu <andy.chiu@sifive.com> To: linux-riscv@lists.infradead.org, palmer@dabbelt.com, anup@brainfault.org, atishp@atishpatra.org, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: vineetg@rivosinc.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, Guo Ren <ren_guo@c-sky.com>, Andy Chiu <andy.chiu@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko.stuebner@vrull.eu>, Nick Knight <nick.knight@sifive.com>, Jisheng Zhang <jszhang@kernel.org> Subject: [PATCH -next v14 01/19] riscv: Rename __switch_to_aux -> fpu Date: Fri, 24 Feb 2023 17:01:00 +0000 Message-Id: <20230224170118.16766-2-andy.chiu@sifive.com> In-Reply-To: <20230224170118.16766-1-andy.chiu@sifive.com> References: <20230224170118.16766-1-andy.chiu@sifive.com> Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	riscv: Add vector ISA support \| expand [-next,v14,00/19] riscv: Add vector ISA support [-next,v14,01/19] riscv: Rename __switch_to_aux -> fpu [-next,v14,02/19] riscv: Extending cpufeature.c to detect V-extension [-next,v14,03/19] riscv: Add new csr defines related to vector extension [-next,v14,04/19] riscv: Clear vector regfile on bootup [-next,v14,05/19] riscv: Disable Vector Instructions for kernel itself [-next,v14,06/19] riscv: Introduce Vector enable/disable helpers [-next,v14,07/19] riscv: Introduce riscv_v_vsize to record size of Vector context [-next,v14,08/19] riscv: Introduce struct/helpers to save/restore per-task Vector state [-next,v14,09/19] riscv: Add task switch support for vector [-next,v14,10/19] riscv: Allocate user's vector context in the first-use trap [-next,v14,11/19] riscv: Add ptrace vector support [-next,v14,12/19] riscv: signal: check fp-reserved words unconditionally [-next,v14,13/19] riscv: signal: Add sigcontext save/restore for vector [-next,v14,14/19] riscv: signal: Report signal frame size to userspace via auxv [-next,v14,15/19] riscv: signal: validate altstack to reflect Vector [-next,v14,16/19] riscv: prevent stack corruption by reserving task_pt_regs(p) early [-next,v14,17/19] riscv: kvm: Add V extension to KVM ISA [-next,v14,18/19] riscv: KVM: Add vector lazy save/restore support [-next,v14,19/19] riscv: Enable Vector code to be built

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20230224170118.16766-2-andy.chiu@sifive.com (mailing list archive)

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Headers

From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org,
	palmer@dabbelt.com,
	anup@brainfault.org,
	atishp@atishpatra.org,
	kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org
Cc: vineetg@rivosinc.com,
	greentime.hu@sifive.com,
	guoren@linux.alibaba.com,
	Guo Ren <ren_guo@c-sky.com>,
	Andy Chiu <andy.chiu@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Guo Ren <guoren@kernel.org>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Nick Knight <nick.knight@sifive.com>,
	Jisheng Zhang <jszhang@kernel.org>
Subject: [PATCH -next v14 01/19] riscv: Rename __switch_to_aux -> fpu
Date: Fri, 24 Feb 2023 17:01:00 +0000
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Series

riscv: Add vector ISA support | expand

Commit Message

Andy Chiu Feb. 24, 2023, 5:01 p.m. UTC

From: Guo Ren <ren_guo@c-sky.com>

The name of __switch_to_aux is not clear and rename it with the
determine function: __switch_to_fpu. Next we could add other regs'
switch.

Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/include/asm/switch_to.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Conor Dooley Feb. 28, 2023, 9:56 p.m. UTC | #1

On Fri, Feb 24, 2023 at 05:01:00PM +0000, Andy Chiu wrote:
> From: Guo Ren <ren_guo@c-sky.com>
> 
> The name of __switch_to_aux is not clear and rename it with the
> determine function: __switch_to_fpu. Next we could add other regs'
> switch.
> 
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Reviewed-by: Anup Patel <anup@brainfault.org>
> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>

Suppose I shall tack myself onto the end of this list...
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 60f8ca01d36e..4b96b13dee27 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -46,7 +46,7 @@  static inline void fstate_restore(struct task_struct *task,
 	}
 }
 
-static inline void __switch_to_aux(struct task_struct *prev,
+static inline void __switch_to_fpu(struct task_struct *prev,
 				   struct task_struct *next)
 {
 	struct pt_regs *regs;
@@ -66,7 +66,7 @@  static __always_inline bool has_fpu(void)
 static __always_inline bool has_fpu(void) { return false; }
 #define fstate_save(task, regs) do { } while (0)
 #define fstate_restore(task, regs) do { } while (0)
-#define __switch_to_aux(__prev, __next) do { } while (0)
+#define __switch_to_fpu(__prev, __next) do { } while (0)
 #endif
 
 extern struct task_struct *__switch_to(struct task_struct *,
@@ -77,7 +77,7 @@  do {							\
 	struct task_struct *__prev = (prev);		\
 	struct task_struct *__next = (next);		\
 	if (has_fpu())					\
-		__switch_to_aux(__prev, __next);	\
+		__switch_to_fpu(__prev, __next);	\
 	((last) = __switch_to(__prev, __next));		\
 } while (0)

[-next,v14,01/19] riscv: Rename __switch_to_aux -> fpu

Commit Message

Comments

Patch