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[v1,04/18] arm64/sysreg: add HFGxTR_EL2 bits for Permission Indirection Extension

Message ID 20230309145246.22787-5-joey.gouly@arm.com (mailing list archive)
State New, archived
Headers show
Series Permission Indirection Extension | expand

Commit Message

Joey Gouly March 9, 2023, 2:52 p.m. UTC
Add the trap bit definitions for nPIR_EL1 and nPIRE0_EL1.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Mark Brown March 9, 2023, 3:25 p.m. UTC | #1
On Thu, Mar 09, 2023 at 02:52:32PM +0000, Joey Gouly wrote:

> Add the trap bit definitions for nPIR_EL1 and nPIRE0_EL1.

>  /* HFG[WR]TR_EL2 bit definitions */
> +#define HFGxTR_EL2_nPIR_EL0_SHIFT	58
> +#define HFGxTR_EL2_nPIR_EL0_MASK	BIT_MASK(HFGxTR_EL2_nPIR_EL0_SHIFT)
> +#define HFGxTR_EL2_nPIREO_EL0_SHIFT	57
> +#define HFGxTR_EL2_nPIREO_EL0_MASK	BIT_MASK(HFGxTR_EL2_nPIREO_EL0_SHIFT)

Similarly please add new bits by syncing with the latest XML, in this
case you could pick up the patch I posted the other day for this.
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Patch

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9e3ecba3c4e6..cb9e387e39e0 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -759,6 +759,10 @@ 
 #define ICH_VTR_TDS_MASK	(1 << ICH_VTR_TDS_SHIFT)
 
 /* HFG[WR]TR_EL2 bit definitions */
+#define HFGxTR_EL2_nPIR_EL0_SHIFT	58
+#define HFGxTR_EL2_nPIR_EL0_MASK	BIT_MASK(HFGxTR_EL2_nPIR_EL0_SHIFT)
+#define HFGxTR_EL2_nPIREO_EL0_SHIFT	57
+#define HFGxTR_EL2_nPIREO_EL0_MASK	BIT_MASK(HFGxTR_EL2_nPIREO_EL0_SHIFT)
 #define HFGxTR_EL2_nTPIDR2_EL0_SHIFT	55
 #define HFGxTR_EL2_nTPIDR2_EL0_MASK	BIT_MASK(HFGxTR_EL2_nTPIDR2_EL0_SHIFT)
 #define HFGxTR_EL2_nSMPRI_EL1_SHIFT	54