Message ID | 20230323044929.8694-3-quic_kathirav@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Add initial support for RDP468 of IPQ5332 family | expand |
On 23/03/2023 05:49, Kathiravan T wrote: > Add the initial device tree support for the Reference Design > Platform(RDP) 468 based on IPQ5332 family of SoCs. This patch carries the > support for Console UART, SPI NOR, eMMC. > > Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 103 ++++++++++++++++++++ > 2 files changed, 104 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 1a29403400b7..79cf8373997f 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb > dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb > dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq5332-mi01.2.dtb > +dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp468.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb > diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts > new file mode 100644 > index 000000000000..b2899f953aa4 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts > @@ -0,0 +1,103 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * IPQ5332 RDP468 board device tree source > + * > + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "ipq5332.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6"; > + compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; > + > + aliases { > + serial0 = &blsp1_uart0; > + }; > + > + chosen { > + stdout-path = "serial0"; > + }; > +}; > + > +&blsp1_uart0 { > + pinctrl-0 = <&serial_0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&blsp1_spi0 { > + pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + flash@0 { > + compatible = "micron,n25q128a11", "jedec,spi-nor"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0>; reg is always second property, after compatible. > + spi-max-frequency = <50000000>; > + }; > +}; > + Best regards, Krzysztof
Hi Kathiravan, Thank you for the patch! Yet something to improve: [auto build test ERROR on next-20230322] [cannot apply to robh/for-next v6.3-rc3 v6.3-rc2 v6.3-rc1 linus/master v6.3-rc3] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Kathiravan-T/arm-qcom-document-MI01-6-board-based-on-IPQ5332-family/20230323-125035 patch link: https://lore.kernel.org/r/20230323044929.8694-3-quic_kathirav%40quicinc.com patch subject: [PATCH 2/2] arm64: dts: qcom: ipq5332: add support for the RDP468 variant config: arm64-randconfig-s032-20230322 (https://download.01.org/0day-ci/archive/20230323/202303231817.8ZgIUk1u-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 12.1.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.4-39-gce1a6720-dirty # https://github.com/intel-lab-lkp/linux/commit/4ffc03616fd37a138e119e0e8ee38944b2f7d99d git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Kathiravan-T/arm-qcom-document-MI01-6-board-based-on-IPQ5332-family/20230323-125035 git checkout 4ffc03616fd37a138e119e0e8ee38944b2f7d99d # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm64 olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm64 SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Link: https://lore.kernel.org/oe-kbuild-all/202303231817.8ZgIUk1u-lkp@intel.com/ All errors (new ones prefixed by >>): >> Error: arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts:31.1-12 Label or path blsp1_spi0 not found >> FATAL ERROR: Syntax error parsing input tree
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 1a29403400b7..79cf8373997f 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-mi01.2.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp468.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts new file mode 100644 index 000000000000..b2899f953aa4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * IPQ5332 RDP468 board device tree source + * + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ipq5332.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6"; + compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; + + aliases { + serial0 = &blsp1_uart0; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + +&blsp1_uart0 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_spi0 { + pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "micron,n25q128a11", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; + +&sdhc { + bus-width = <4>; + max-frequency = <192000000>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&sdc_default_state>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&xo_board { + clock-frequency = <24000000>; +}; + +/* PINCTRL */ + +&tlmm { + sdc_default_state: sdc-default-state { + clk-pins { + pins = "gpio13"; + function = "sdc_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio12"; + function = "sdc_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "sdc_data"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + spi_0_data_clk_pins: spi-0-data-clk-state { + pins = "gpio14", "gpio15", "gpio16"; + function = "blsp0_spi"; + drive-strength = <2>; + bias-pull-down; + }; + + spi_0_cs_pins: spi-0-cs-state { + pins = "gpio17"; + function = "blsp0_spi"; + drive-strength = <2>; + bias-pull-up; + }; +};
Add the initial device tree support for the Reference Design Platform(RDP) 468 based on IPQ5332 family of SoCs. This patch carries the support for Console UART, SPI NOR, eMMC. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 103 ++++++++++++++++++++ 2 files changed, 104 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts