| Message ID | 20230324201528.2540564-2-elder@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: dts: qcom: sdx65: support IPA | expand |
On 24/03/2023 21:15, Alex Elder wrote: > Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P > nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. > > Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust > Zone on this platform. > > Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > Signed-off-by: Alex Elder <elder@linaro.org> > --- > arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ > arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ > 2 files changed, 43 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts > index ed98c83c141fc..72e25de0db5fc 100644 > --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts > +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts > @@ -245,6 +245,11 @@ &blsp1_uart3 { > status = "okay"; > }; > > +&ipa { > + qcom,gsi-loader = "skip"; > + status = "okay"; > +}; > + > &qpic_bam { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi > index 192f9f94bc8b4..360d6dc144811 100644 > --- a/arch/arm/boot/dts/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi > @@ -11,6 +11,7 @@ > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/power/qcom-rpmpd.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > +#include <dt-bindings/interconnect/qcom,sdx65.h> > > / { > #address-cells = <1>; > @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + ipa: ipa@3e04000 { > + compatible = "qcom,sdx65-ipa"; > + > + iommus = <&apps_smmu 0x5e0 0x0>, > + <&apps_smmu 0x5e2 0x0>; > + reg = <0x3f40000 0x10000>, > + <0x3f50000 0x5000>, > + <0x3e04000 0xfc000>; > + reg-names = "ipa-reg", > + "ipa-shared", > + "gsi"; > + > + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, > + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, > + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, > + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "ipa", > + "gsi", > + "ipa-clock-query", > + "ipa-setup-ready"; These look misaligned. With above: Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
On 25.03.2023 12:14, Krzysztof Kozlowski wrote: > On 24/03/2023 21:15, Alex Elder wrote: >> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >> >> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >> Zone on this platform. >> >> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >> Signed-off-by: Alex Elder <elder@linaro.org> >> --- >> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >> 2 files changed, 43 insertions(+) >> >> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> index ed98c83c141fc..72e25de0db5fc 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> @@ -245,6 +245,11 @@ &blsp1_uart3 { >> status = "okay"; >> }; >> >> +&ipa { >> + qcom,gsi-loader = "skip"; >> + status = "okay"; >> +}; >> + >> &qpic_bam { >> status = "okay"; >> }; >> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >> index 192f9f94bc8b4..360d6dc144811 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >> @@ -11,6 +11,7 @@ >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> #include <dt-bindings/power/qcom-rpmpd.h> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> +#include <dt-bindings/interconnect/qcom,sdx65.h> >> >> / { >> #address-cells = <1>; >> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >> #hwlock-cells = <1>; >> }; >> >> + ipa: ipa@3e04000 { >> + compatible = "qcom,sdx65-ipa"; >> + >> + iommus = <&apps_smmu 0x5e0 0x0>, >> + <&apps_smmu 0x5e2 0x0>; >> + reg = <0x3f40000 0x10000>, >> + <0x3f50000 0x5000>, >> + <0x3e04000 0xfc000>; >> + reg-names = "ipa-reg", >> + "ipa-shared", >> + "gsi"; >> + >> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "ipa", >> + "gsi", >> + "ipa-clock-query", >> + "ipa-setup-ready"; > > These look misaligned. > > With above: > > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> With this and moving iommus below interconnect: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > > > Best regards, > Krzysztof >
On 3/25/23 6:14 AM, Krzysztof Kozlowski wrote: > On 24/03/2023 21:15, Alex Elder wrote: >> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >> >> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >> Zone on this platform. >> >> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >> Signed-off-by: Alex Elder <elder@linaro.org> >> --- >> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >> 2 files changed, 43 insertions(+) >> >> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> index ed98c83c141fc..72e25de0db5fc 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >> @@ -245,6 +245,11 @@ &blsp1_uart3 { >> status = "okay"; >> }; >> >> +&ipa { >> + qcom,gsi-loader = "skip"; >> + status = "okay"; >> +}; >> + >> &qpic_bam { >> status = "okay"; >> }; >> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >> index 192f9f94bc8b4..360d6dc144811 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >> @@ -11,6 +11,7 @@ >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> #include <dt-bindings/power/qcom-rpmpd.h> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> +#include <dt-bindings/interconnect/qcom,sdx65.h> >> >> / { >> #address-cells = <1>; >> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >> #hwlock-cells = <1>; >> }; >> >> + ipa: ipa@3e04000 { >> + compatible = "qcom,sdx65-ipa"; >> + >> + iommus = <&apps_smmu 0x5e0 0x0>, >> + <&apps_smmu 0x5e2 0x0>; >> + reg = <0x3f40000 0x10000>, >> + <0x3f50000 0x5000>, >> + <0x3e04000 0xfc000>; >> + reg-names = "ipa-reg", >> + "ipa-shared", >> + "gsi"; >> + >> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "ipa", >> + "gsi", >> + "ipa-clock-query", >> + "ipa-setup-ready"; > > These look misaligned. I believe this is the alignment convention used by all IPA nodes in DTS files. It's possible I'm not seeing something you are, but... what alignment should be used? And if I change this, should I change all others? Thanks. -Alex > > With above: > > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > > > Best regards, > Krzysztof >
On 26/03/2023 18:01, Alex Elder wrote: > On 3/25/23 6:14 AM, Krzysztof Kozlowski wrote: >> On 24/03/2023 21:15, Alex Elder wrote: >>> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >>> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >>> >>> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >>> Zone on this platform. >>> >>> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >>> Signed-off-by: Alex Elder <elder@linaro.org> >>> --- >>> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >>> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >>> 2 files changed, 43 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> index ed98c83c141fc..72e25de0db5fc 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> @@ -245,6 +245,11 @@ &blsp1_uart3 { >>> status = "okay"; >>> }; >>> >>> +&ipa { >>> + qcom,gsi-loader = "skip"; >>> + status = "okay"; >>> +}; >>> + >>> &qpic_bam { >>> status = "okay"; >>> }; >>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> index 192f9f94bc8b4..360d6dc144811 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> @@ -11,6 +11,7 @@ >>> #include <dt-bindings/interrupt-controller/arm-gic.h> >>> #include <dt-bindings/power/qcom-rpmpd.h> >>> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >>> +#include <dt-bindings/interconnect/qcom,sdx65.h> >>> >>> / { >>> #address-cells = <1>; >>> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >>> #hwlock-cells = <1>; >>> }; >>> >>> + ipa: ipa@3e04000 { >>> + compatible = "qcom,sdx65-ipa"; >>> + >>> + iommus = <&apps_smmu 0x5e0 0x0>, >>> + <&apps_smmu 0x5e2 0x0>; >>> + reg = <0x3f40000 0x10000>, >>> + <0x3f50000 0x5000>, >>> + <0x3e04000 0xfc000>; >>> + reg-names = "ipa-reg", >>> + "ipa-shared", >>> + "gsi"; >>> + >>> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >>> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >>> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >>> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >>> + interrupt-names = "ipa", >>> + "gsi", >>> + "ipa-clock-query", >>> + "ipa-setup-ready"; >> >> These look misaligned. > > I believe this is the alignment convention used by all IPA nodes > in DTS files. It's possible I'm not seeing something you are, > but... what alignment should be used? And if I change this, > should I change all others? If this is aligned, then fine. The diff points it is not, but the diff might be a bit tricky sometimes. Alignment is till " in previous line. For example sdm845 looks fine. Best regards, Krzysztof
On 3/25/23 7:12 AM, Konrad Dybcio wrote: > > > On 25.03.2023 12:14, Krzysztof Kozlowski wrote: >> On 24/03/2023 21:15, Alex Elder wrote: >>> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >>> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >>> >>> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >>> Zone on this platform. >>> >>> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >>> Signed-off-by: Alex Elder <elder@linaro.org> >>> --- >>> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >>> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >>> 2 files changed, 43 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> index ed98c83c141fc..72e25de0db5fc 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>> @@ -245,6 +245,11 @@ &blsp1_uart3 { >>> status = "okay"; >>> }; >>> >>> +&ipa { >>> + qcom,gsi-loader = "skip"; >>> + status = "okay"; >>> +}; >>> + >>> &qpic_bam { >>> status = "okay"; >>> }; >>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> index 192f9f94bc8b4..360d6dc144811 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> @@ -11,6 +11,7 @@ >>> #include <dt-bindings/interrupt-controller/arm-gic.h> >>> #include <dt-bindings/power/qcom-rpmpd.h> >>> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >>> +#include <dt-bindings/interconnect/qcom,sdx65.h> >>> >>> / { >>> #address-cells = <1>; >>> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >>> #hwlock-cells = <1>; >>> }; >>> >>> + ipa: ipa@3e04000 { >>> + compatible = "qcom,sdx65-ipa"; >>> + >>> + iommus = <&apps_smmu 0x5e0 0x0>, >>> + <&apps_smmu 0x5e2 0x0>; >>> + reg = <0x3f40000 0x10000>, >>> + <0x3f50000 0x5000>, >>> + <0x3e04000 0xfc000>; >>> + reg-names = "ipa-reg", >>> + "ipa-shared", >>> + "gsi"; >>> + >>> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >>> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >>> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >>> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >>> + interrupt-names = "ipa", >>> + "gsi", >>> + "ipa-clock-query", >>> + "ipa-setup-ready"; >> >> These look misaligned. >> >> With above: >> >> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > With this and moving iommus below interconnect: Is there guidance somewhere that states what order should be used for these properties? Why should iommus be below interconnects? As I said to Krzysztof, I *think* all of the IPA nodes look like this; should all of them be updated to follow whatever the preferred convention is? Thanks. -Alex > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Konrad >> >> >> Best regards, >> Krzysztof >>
On 3/26/23 11:04 AM, Krzysztof Kozlowski wrote: > On 26/03/2023 18:01, Alex Elder wrote: >> On 3/25/23 6:14 AM, Krzysztof Kozlowski wrote: >>> On 24/03/2023 21:15, Alex Elder wrote: >>>> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >>>> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >>>> >>>> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >>>> Zone on this platform. >>>> >>>> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >>>> Signed-off-by: Alex Elder <elder@linaro.org> >>>> --- >>>> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >>>> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >>>> 2 files changed, 43 insertions(+) >>>> >>>> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> index ed98c83c141fc..72e25de0db5fc 100644 >>>> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> @@ -245,6 +245,11 @@ &blsp1_uart3 { >>>> status = "okay"; >>>> }; >>>> >>>> +&ipa { >>>> + qcom,gsi-loader = "skip"; >>>> + status = "okay"; >>>> +}; >>>> + >>>> &qpic_bam { >>>> status = "okay"; >>>> }; >>>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> index 192f9f94bc8b4..360d6dc144811 100644 >>>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> @@ -11,6 +11,7 @@ >>>> #include <dt-bindings/interrupt-controller/arm-gic.h> >>>> #include <dt-bindings/power/qcom-rpmpd.h> >>>> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >>>> +#include <dt-bindings/interconnect/qcom,sdx65.h> >>>> >>>> / { >>>> #address-cells = <1>; >>>> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >>>> #hwlock-cells = <1>; >>>> }; >>>> >>>> + ipa: ipa@3e04000 { >>>> + compatible = "qcom,sdx65-ipa"; >>>> + >>>> + iommus = <&apps_smmu 0x5e0 0x0>, >>>> + <&apps_smmu 0x5e2 0x0>; >>>> + reg = <0x3f40000 0x10000>, >>>> + <0x3f50000 0x5000>, >>>> + <0x3e04000 0xfc000>; >>>> + reg-names = "ipa-reg", >>>> + "ipa-shared", >>>> + "gsi"; >>>> + >>>> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >>>> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >>>> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >>>> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >>>> + interrupt-names = "ipa", >>>> + "gsi", >>>> + "ipa-clock-query", >>>> + "ipa-setup-ready"; >>> >>> These look misaligned. >> >> I believe this is the alignment convention used by all IPA nodes >> in DTS files. It's possible I'm not seeing something you are, >> but... what alignment should be used? And if I change this, >> should I change all others? > > If this is aligned, then fine. The diff points it is not, but the diff > might be a bit tricky sometimes. > > Alignment is till " in previous line. For example sdm845 looks fine. OK thank you. I will send v2 of this series after I hear back from Konrad, adding your reviewed-by, and will double-check the alignment as well. -Alex > > > Best regards, > Krzysztof >
On 26.03.2023 18:04, Alex Elder wrote: > On 3/25/23 7:12 AM, Konrad Dybcio wrote: >> >> >> On 25.03.2023 12:14, Krzysztof Kozlowski wrote: >>> On 24/03/2023 21:15, Alex Elder wrote: >>>> Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P >>>> nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. >>>> >>>> Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust >>>> Zone on this platform. >>>> >>>> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >>>> Signed-off-by: Alex Elder <elder@linaro.org> >>>> --- >>>> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++ >>>> arch/arm/boot/dts/qcom-sdx65.dtsi | 38 ++++++++++++++++++++++++++++ >>>> 2 files changed, 43 insertions(+) >>>> >>>> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> index ed98c83c141fc..72e25de0db5fc 100644 >>>> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts >>>> @@ -245,6 +245,11 @@ &blsp1_uart3 { >>>> status = "okay"; >>>> }; >>>> +&ipa { >>>> + qcom,gsi-loader = "skip"; >>>> + status = "okay"; >>>> +}; >>>> + >>>> &qpic_bam { >>>> status = "okay"; >>>> }; >>>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> index 192f9f94bc8b4..360d6dc144811 100644 >>>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> @@ -11,6 +11,7 @@ >>>> #include <dt-bindings/interrupt-controller/arm-gic.h> >>>> #include <dt-bindings/power/qcom-rpmpd.h> >>>> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >>>> +#include <dt-bindings/interconnect/qcom,sdx65.h> >>>> / { >>>> #address-cells = <1>; >>>> @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { >>>> #hwlock-cells = <1>; >>>> }; >>>> + ipa: ipa@3e04000 { >>>> + compatible = "qcom,sdx65-ipa"; >>>> + >>>> + iommus = <&apps_smmu 0x5e0 0x0>, >>>> + <&apps_smmu 0x5e2 0x0>; >>>> + reg = <0x3f40000 0x10000>, >>>> + <0x3f50000 0x5000>, >>>> + <0x3e04000 0xfc000>; >>>> + reg-names = "ipa-reg", >>>> + "ipa-shared", >>>> + "gsi"; >>>> + >>>> + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, >>>> + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, >>>> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, >>>> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; >>>> + interrupt-names = "ipa", >>>> + "gsi", >>>> + "ipa-clock-query", >>>> + "ipa-setup-ready"; >>> >>> These look misaligned. >>> >>> With above: >>> >>> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> >> With this and moving iommus below interconnect: > > Is there guidance somewhere that states what order should be > used for these properties? This is a very slippery topic, but.. Why should iommus be below > interconnects? ..everybody agrees iommus shouldn't between compatible and reg (these two go first hand-in-hand) and most of our DTs have it somewhere low, often below interconnect. In a perfect world we'd have a computer taking care of this but for now it remains an open question. > > As I said to Krzysztof, I *think* all of the IPA nodes look > like this; should all of them be updated to follow whatever > the preferred convention is? This is the ugly part of this, we don't have a solid, widely-agreed-upon scheme of ordering properties other than some loose guidelines (e.g. compatible, reg, ..., status), so I think it's not worth making extra noise in existing files until figure it out. Konrad > > Thanks. > > -Alex > > >> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> >> Konrad >>> >>> >>> Best regards, >>> Krzysztof >>> >
On 3/27/23 3:57 AM, Konrad Dybcio wrote: > so I think it's not worth making extra noise in existing files > until figure it out. In that case, would you be OK if I leave this consistent with the rest, and once it's figured out, I'll fix them all at once? -Alex
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index ed98c83c141fc..72e25de0db5fc 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -245,6 +245,11 @@ &blsp1_uart3 { status = "okay"; }; +&ipa { + qcom,gsi-loader = "skip"; + status = "okay"; +}; + &qpic_bam { status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 192f9f94bc8b4..360d6dc144811 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> +#include <dt-bindings/interconnect/qcom,sdx65.h> / { #address-cells = <1>; @@ -299,6 +300,43 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells = <1>; }; + ipa: ipa@3e04000 { + compatible = "qcom,sdx65-ipa"; + + iommus = <&apps_smmu 0x5e0 0x0>, + <&apps_smmu 0x5e2 0x0>; + reg = <0x3f40000 0x10000>, + <0x3f50000 0x5000>, + <0x3e04000 0xfc000>; + reg-names = "ipa-reg", + "ipa-shared", + "gsi"; + + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI1>, + <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IPA_CFG>; + interconnect-names = "memory", + "config"; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + + status = "disabled"; + }; + remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sdx55-mpss-pas"; reg = <0x04080000 0x4040>;