| Message ID | 20230203-evk-board-support-v3-6-0003e80e0095@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Improve the MT8365 SoC and EVK board support | expand |
Il 29/03/23 10:54, Alexandre Mergnat ha scritto: > In order to use the PMIC, the pwrap support should be added > to allow communication between the SoC and the PMIC. > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > index e018df6844f6..687011353f69 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > @@ -186,6 +186,18 @@ apmixedsys: syscon@1000c000 { > #clock-cells = <1>; > }; > > + pwrap: pwrap@1000d000 { > + compatible = "mediatek,mt8365-pwrap"; > + reg = <0 0x1000d000 0 0x1000>; > + reg-names = "pwrap"; > + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&infracfg CLK_IFR_PWRAP_SPI>, > + <&infracfg CLK_IFR_PMIC_AP>, > + <&infracfg CLK_IFR_PWRAP_SYS>, > + <&infracfg CLK_IFR_PWRAP_TMR>; I would prefer: clocks = <&infracfg CLK_IFR_PWRAP_SPI>, <&infracfg CLK_IFR_PMIC_AP>, <&infracfg CLK_IFR_PWRAP_SYS>, <&infracfg CLK_IFR_PWRAP_TMR>; ....but I'll leave this choice to you, as I don't have really strong opinions on this one, so, with or without the proposed change, you still get my: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On 29/03/2023 10:54, Alexandre Mergnat wrote: > In order to use the PMIC, the pwrap support should be added > to allow communication between the SoC and the PMIC. > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Applied, thanks. > --- > arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > index e018df6844f6..687011353f69 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > @@ -186,6 +186,18 @@ apmixedsys: syscon@1000c000 { > #clock-cells = <1>; > }; > > + pwrap: pwrap@1000d000 { > + compatible = "mediatek,mt8365-pwrap"; > + reg = <0 0x1000d000 0 0x1000>; > + reg-names = "pwrap"; > + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&infracfg CLK_IFR_PWRAP_SPI>, > + <&infracfg CLK_IFR_PMIC_AP>, > + <&infracfg CLK_IFR_PWRAP_SYS>, > + <&infracfg CLK_IFR_PWRAP_TMR>; > + clock-names = "spi", "wrap", "sys", "tmr"; > + }; > + > keypad: keypad@10010000 { > compatible = "mediatek,mt6779-keypad"; > reg = <0 0x10010000 0 0x1000>; >
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index e018df6844f6..687011353f69 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -186,6 +186,18 @@ apmixedsys: syscon@1000c000 { #clock-cells = <1>; }; + pwrap: pwrap@1000d000 { + compatible = "mediatek,mt8365-pwrap"; + reg = <0 0x1000d000 0 0x1000>; + reg-names = "pwrap"; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&infracfg CLK_IFR_PWRAP_SPI>, + <&infracfg CLK_IFR_PMIC_AP>, + <&infracfg CLK_IFR_PWRAP_SYS>, + <&infracfg CLK_IFR_PWRAP_TMR>; + clock-names = "spi", "wrap", "sys", "tmr"; + }; + keypad: keypad@10010000 { compatible = "mediatek,mt6779-keypad"; reg = <0 0x10010000 0 0x1000>;
In order to use the PMIC, the pwrap support should be added to allow communication between the SoC and the PMIC. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)