diff mbox series

[v3,3/4] ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency

Message ID 20230328101517.1595738-4-tudor.ambarus@linaro.org (mailing list archive)
State New, archived
Headers show
Series ARM: dts: at91: Set sst26vf064b SPI NOR flash at its maxumum frequency | expand

Commit Message

Tudor Ambarus March 28, 2023, 10:15 a.m. UTC
From: Tudor Ambarus <tudor.ambarus@microchip.com>

sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~37%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 arch/arm/boot/dts/at91-sama5d2_icp.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Nicolas Ferre March 30, 2023, 6:41 p.m. UTC | #1
On 28/03/2023 at 12:15, Tudor Ambarus wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
> 
> sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating
> frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
> increase its maximum supported frequency to 104MHz. The increasing of the
> spi-max-frequency value requires the setting of the
> "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
> 
> The sst26vf064b datasheet specifies just a minimum value for the
> "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
> maximum time specified. I determined experimentally that 5 ns for the
> spi-cs-setup-ns is not enough when the flash is operated close to its
> maximum frequency and tests showed that 7 ns is just fine, so set the
> spi-cs-setup-ns dt property to 7.
> 
> With the increase of frequency the reads are now faster with ~37%.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>

Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP 
board with a linux-next kernel today.

Thanks Tudor!

Best regards,
   Nicolas

> ---
>   arch/arm/boot/dts/at91-sama5d2_icp.dts | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts
> index 1346b8f2b259..999adeca6f33 100644
> --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts
> +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts
> @@ -669,7 +669,8 @@ flash@0 {
>                  #size-cells = <1>;
>                  compatible = "jedec,spi-nor";
>                  reg = <0>;
> -               spi-max-frequency = <80000000>;
> +               spi-max-frequency = <104000000>;
> +               spi-cs-setup-ns = <7>;
>                  spi-tx-bus-width = <4>;
>                  spi-rx-bus-width = <4>;
>                  m25p,fast-read;
> --
> 2.40.0.348.gf938b09366-goog
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts
index 1346b8f2b259..999adeca6f33 100644
--- a/arch/arm/boot/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts
@@ -669,7 +669,8 @@  flash@0 {
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <104000000>;
+		spi-cs-setup-ns = <7>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		m25p,fast-read;