| Message ID | 20230328101517.1595738-1-tudor.ambarus@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | ARM: dts: at91: Set sst26vf064b SPI NOR flash at its maxumum frequency | expand |
On 28/03/2023 at 12:15, Tudor Ambarus wrote: > Changes in v3: Update S-o-b tag to match author's email. > Changes in v2: update value of spi-cs-setup-ns as it was changed to u32 > since the first proposal. > v1 at: https://lore.kernel.org/linux-mtd/20221117105249.115649-1-tudor.ambarus@microchip.com/ > > --- > SPI NOR flashes have specific cs-setup time requirements without which > they can't work at frequencies close to their maximum supported frequency, > as they miss the first bits of the instruction command. Unrecognized > commands are ignored, thus the flash will be unresponsive. Introduce the > spi-cs-setup-ns property to allow spi devices to specify their cs setup > time. Now that it's tested: Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> to the whole series and I'll queue them on at91-dt branch and changed your email address when doing so. Thanks for your patches Tudor, it's appreciated! Best regards, Nicolas > Tudor Ambarus (4): > ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its > maximum frequency > ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its > maximum frequency > ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its > maximum frequency > ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its > maximum frequency > > arch/arm/boot/dts/at91-sam9x60ek.dts | 3 ++- > arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 3 ++- > arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 3 ++- > arch/arm/boot/dts/at91-sama5d2_icp.dts | 3 ++- > 4 files changed, 8 insertions(+), 4 deletions(-) > > -- > 2.40.0.348.gf938b09366-goog >
On 3/30/23 19:53, Nicolas Ferre wrote: > On 28/03/2023 at 12:15, Tudor Ambarus wrote: >> Changes in v3: Update S-o-b tag to match author's email. >> Changes in v2: update value of spi-cs-setup-ns as it was changed to u32 >> since the first proposal. >> v1 at: >> https://lore.kernel.org/linux-mtd/20221117105249.115649-1-tudor.ambarus@microchip.com/ >> >> --- >> SPI NOR flashes have specific cs-setup time requirements without which >> they can't work at frequencies close to their maximum supported >> frequency, >> as they miss the first bits of the instruction command. Unrecognized >> commands are ignored, thus the flash will be unresponsive. Introduce the >> spi-cs-setup-ns property to allow spi devices to specify their cs setup >> time. > > Now that it's tested: > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> > to the whole series and I'll queue them on at91-dt branch and changed > your email address when doing so. > > Thanks for your patches Tudor, it's appreciated! Best regards, My pleasure, I'm happy I could help. Cheers, ta
Changes in v3: Update S-o-b tag to match author's email. Changes in v2: update value of spi-cs-setup-ns as it was changed to u32 since the first proposal. v1 at: https://lore.kernel.org/linux-mtd/20221117105249.115649-1-tudor.ambarus@microchip.com/ --- SPI NOR flashes have specific cs-setup time requirements without which they can't work at frequencies close to their maximum supported frequency, as they miss the first bits of the instruction command. Unrecognized commands are ignored, thus the flash will be unresponsive. Introduce the spi-cs-setup-ns property to allow spi devices to specify their cs setup time. Tudor Ambarus (4): ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency arch/arm/boot/dts/at91-sam9x60ek.dts | 3 ++- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 3 ++- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 3 ++- arch/arm/boot/dts/at91-sama5d2_icp.dts | 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-)