Message ID | 20230330141536.22480-1-hnagalla@ti.com (mailing list archive) |
---|---|
Headers | show |
Series | Add R5F and C71 DSP nodes for J784S4 SoC | expand |
On 09:15-20230330, Hari Nagalla wrote: > This series adds the R5F cluster and C71 DSP processor nodes for > J784S4 SoC. > > The first patch adds R5F cluster nodes to the MAIN and MCU voltage > domains of J784S4 SoC. The second patch adds the C71 DSP processor > nodes to the MAIN voltage domain of J784S4 SoC. > > Changes in V2: > - Removed default disable of R5F nodes in the SoC device tree. > - Consolidated R5F nodes into one patch. > > V1: https://lore.kernel.org/all/20230329093627.30719-1-hnagalla@ti.com/ > > Hari Nagalla (2): > arm64: dts: ti: k3-j784s4-main: Add R5F cluster nodes > arm64: dts: ti: k3-j784s4-main: Add C71x DSP nodes > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 168 ++++++++++++++++++ > .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++ > 2 files changed, 208 insertions(+) > > -- > 2.17.1 > No specific need for board file memory reservations for DDR?
On 3/30/23 09:55, Nishanth Menon wrote: >> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 168 ++++++++++++++++++ >> .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++ >> 2 files changed, 208 insertions(+) >> >> -- >> 2.17.1 >> > No specific need for board file memory reservations for DDR? They are needed in board file, but to be submitted in separate patch set.
On 04:31-20230331, Hari Nagalla wrote: > On 3/30/23 09:55, Nishanth Menon wrote: > > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 168 ++++++++++++++++++ > > > .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++ > > > 2 files changed, 208 insertions(+) > > > > > > -- > > > 2.17.1 > > > > > No specific need for board file memory reservations for DDR? > They are needed in board file, but to be submitted in separate patch set. Sorry, NAK, please submit as a single series.