diff mbox series

[kvm-unit-tests,v4,3/3] s390x/spec_ex: Add test of EXECUTE with odd target address

Message ID 20230317133253.965010-4-nsg@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series s390x: Add misaligned instruction tests | expand

Commit Message

Nina Schoetterl-Glausch March 17, 2023, 1:32 p.m. UTC 
The EXECUTE instruction executes the instruction at the given target
address. This address must be halfword aligned, otherwise a
specification exception occurs.
Add a test for this.

Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
---
 s390x/spec_ex.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

Comments

Thomas Huth April 3, 2023, 3:38 p.m. UTC | #1 
On 17/03/2023 14.32, Nina Schoetterl-Glausch wrote:
> The EXECUTE instruction executes the instruction at the given target
> address. This address must be halfword aligned, otherwise a
> specification exception occurs.
> Add a test for this.
> 
> Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
> ---
>   s390x/spec_ex.c | 25 +++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
> index ab023347..b4b9095f 100644
> --- a/s390x/spec_ex.c
> +++ b/s390x/spec_ex.c
> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void)
>   	return 0;
>   }
>   
> +static int odd_ex_target(void)
> +{
> +	uint64_t pre_target_addr;
> +	int to = 0, from = 0x0dd;
> +
> +	asm volatile ( ".pushsection .text.ex_odd\n"
> +		"	.balign	2\n"
> +		"pre_odd_ex_target:\n"
> +		"	. = . + 1\n"
> +		"	lr	%[to],%[from]\n"
> +		"	.popsection\n"
> +
> +		"	larl	%[pre_target_addr],pre_odd_ex_target\n"
> +		"	ex	0,1(%[pre_target_addr])\n"
> +		: [pre_target_addr] "=&a" (pre_target_addr),
> +		  [to] "+d" (to)
> +		: [from] "d" (from)
> +	);
> +
> +	assert((pre_target_addr + 1) & 1);
> +	report(to != from, "did not perform ex with odd target");
> +	return 0;
> +}

  Hi Nina,

FWIW, this fails to compile with Clang v15 here:

s390x/spec_ex.c:187:4: error: symbol 'pre_odd_ex_target' is already defined
                 "pre_odd_ex_target:\n"
                  ^
<inline asm>:3:1: note: instantiated into assembly here
pre_odd_ex_target:

No clue yet why that happens ... but compiling with Clang seems to be broken 
on some other spots, too, so this is not really critical right now ;-)

  Thomas
Nina Schoetterl-Glausch April 4, 2023, 8:57 a.m. UTC | #2 
On Mon, 2023-04-03 at 17:38 +0200, Thomas Huth wrote:
> On 17/03/2023 14.32, Nina Schoetterl-Glausch wrote:
> > The EXECUTE instruction executes the instruction at the given target
> > address. This address must be halfword aligned, otherwise a
> > specification exception occurs.
> > Add a test for this.
> > 
> > Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
> > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
> > ---
> >   s390x/spec_ex.c | 25 +++++++++++++++++++++++++
> >   1 file changed, 25 insertions(+)
> > 
> > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
> > index ab023347..b4b9095f 100644
> > --- a/s390x/spec_ex.c
> > +++ b/s390x/spec_ex.c
> > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void)
> >   	return 0;
> >   }
> >   
> > +static int odd_ex_target(void)
> > +{
> > +	uint64_t pre_target_addr;
> > +	int to = 0, from = 0x0dd;
> > +
> > +	asm volatile ( ".pushsection .text.ex_odd\n"
> > +		"	.balign	2\n"
> > +		"pre_odd_ex_target:\n"
> > +		"	. = . + 1\n"
> > +		"	lr	%[to],%[from]\n"
> > +		"	.popsection\n"
> > +
> > +		"	larl	%[pre_target_addr],pre_odd_ex_target\n"
> > +		"	ex	0,1(%[pre_target_addr])\n"
> > +		: [pre_target_addr] "=&a" (pre_target_addr),
> > +		  [to] "+d" (to)
> > +		: [from] "d" (from)
> > +	);
> > +
> > +	assert((pre_target_addr + 1) & 1);
> > +	report(to != from, "did not perform ex with odd target");
> > +	return 0;
> > +}
> 
>   Hi Nina,
> 
> FWIW, this fails to compile with Clang v15 here:
> 
> s390x/spec_ex.c:187:4: error: symbol 'pre_odd_ex_target' is already defined
>                  "pre_odd_ex_target:\n"
>                   ^
> <inline asm>:3:1: note: instantiated into assembly here
> pre_odd_ex_target:
> 
> No clue yet why that happens ... but compiling with Clang seems to be broken 
> on some other spots, too, so this is not really critical right now ;-)

Thanks, I guess it inlines the function and emits the asm twice.
Interestingly clang cannot load the address of the misaligned_code symbol in C code due to alignement,
so I had to work around that, too.

> 
>   Thomas
>
diff mbox series

Patch

diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
index ab023347..b4b9095f 100644
--- a/s390x/spec_ex.c
+++ b/s390x/spec_ex.c
@@ -177,6 +177,30 @@  static int short_psw_bit_12_is_0(void)
 	return 0;
 }
 
+static int odd_ex_target(void)
+{
+	uint64_t pre_target_addr;
+	int to = 0, from = 0x0dd;
+
+	asm volatile ( ".pushsection .text.ex_odd\n"
+		"	.balign	2\n"
+		"pre_odd_ex_target:\n"
+		"	. = . + 1\n"
+		"	lr	%[to],%[from]\n"
+		"	.popsection\n"
+
+		"	larl	%[pre_target_addr],pre_odd_ex_target\n"
+		"	ex	0,1(%[pre_target_addr])\n"
+		: [pre_target_addr] "=&a" (pre_target_addr),
+		  [to] "+d" (to)
+		: [from] "d" (from)
+	);
+
+	assert((pre_target_addr + 1) & 1);
+	report(to != from, "did not perform ex with odd target");
+	return 0;
+}
+
 static int bad_alignment(void)
 {
 	uint32_t words[5] __attribute__((aligned(16)));
@@ -218,6 +242,7 @@  static const struct spec_ex_trigger spec_ex_triggers[] = {
 	{ "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw },
 	{ "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw },
 	{ "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw },
+	{ "odd_ex_target", &odd_ex_target, true, NULL },
 	{ "bad_alignment", &bad_alignment, true, NULL },
 	{ "not_even", &not_even, true, NULL },
 	{ NULL, NULL, false, NULL },