Message ID | 20230309063514.398705-1-s-vadapalli@ti.com (mailing list archive) |
---|---|
Headers | show |
Series | PHY-GMII-SEL: Add support for SGMII mode | expand |
Hello, This series applies cleanly as of next-20230404. Please merge this series followed by the series at: https://lore.kernel.org/r/20230331062521.529005-1-s-vadapalli@ti.com/ in case of no concerns. Regards, Siddharth. On 09/03/23 12:05, Siddharth Vadapalli wrote: > Hello, > > This series adds support to configure the CPSW MAC's PHY in SGMII mode. > Also, SGMII mode is enabled for TI's J7200 and J721E SoCs. > > Changes from v1: > 1. Add "break" statement within "case PHY_INTERFACE_MODE_SGMII". > 2. Add newline before "default" case. > 3. Update commit message of patch 1/3 to follow the existing convention. > > v1: > https://lore.kernel.org/r/20230309062237.389444-1-s-vadapalli@ti.com/ > > Siddharth Vadapalli (3): > phy: ti: gmii-sel: Add support for SGMII mode > phy: ti: gmii-sel: Enable SGMII mode for J7200 > phy: ti: gmii-sel: Enable SGMII mode for J721E > > drivers/phy/ti/phy-gmii-sel.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) >
On 09/03/2023 08:35, Siddharth Vadapalli wrote: > Hello, > > This series adds support to configure the CPSW MAC's PHY in SGMII mode. > Also, SGMII mode is enabled for TI's J7200 and J721E SoCs. > > Changes from v1: > 1. Add "break" statement within "case PHY_INTERFACE_MODE_SGMII". > 2. Add newline before "default" case. > 3. Update commit message of patch 1/3 to follow the existing convention. > > v1: > https://lore.kernel.org/r/20230309062237.389444-1-s-vadapalli@ti.com/ > > Siddharth Vadapalli (3): > phy: ti: gmii-sel: Add support for SGMII mode > phy: ti: gmii-sel: Enable SGMII mode for J7200 > phy: ti: gmii-sel: Enable SGMII mode for J721E > > drivers/phy/ti/phy-gmii-sel.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > For the series: Reviewed-by: Roger Quadros <rogerq@kernel.org>
On 09-03-23, 12:05, Siddharth Vadapalli wrote: > Hello, > > This series adds support to configure the CPSW MAC's PHY in SGMII mode. > Also, SGMII mode is enabled for TI's J7200 and J721E SoCs. Applied, thanks