Message ID | 20230404164828.8031-2-quic_devipriy@quicinc.com |
---|---|
State | Changes Requested |
Headers | show |
Series | Add PCIe support for IPQ9574 | expand |
Quoting Devi Priya (2023-04-04 09:48:20) > Add PCIe pipe clock definitions for IPQ9574 SoC > > Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
On 04/04/2023 18:48, Devi Priya wrote: > Add PCIe pipe clock definitions for IPQ9574 SoC > > Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> > --- > Changes in V2: Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h index 5a2961bfe893..2d7b46027ce9 100644 --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h @@ -210,4 +210,8 @@ #define GCC_SNOC_PCIE1_1LANE_S_CLK 201 #define GCC_SNOC_PCIE2_2LANE_S_CLK 202 #define GCC_SNOC_PCIE3_2LANE_S_CLK 203 +#define GCC_PCIE0_PIPE_CLK 204 +#define GCC_PCIE1_PIPE_CLK 205 +#define GCC_PCIE2_PIPE_CLK 206 +#define GCC_PCIE3_PIPE_CLK 207 #endif