| Message ID | 20230321215624.78383-7-cristian.ciocaltea@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable I2S support for RK3588/RK3588S SoCs | expand |
On Tue, Mar 21, 2023 at 11:56:20PM +0200, Cristian Ciocaltea wrote: > Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & > dma-names properties") documented dma-names property to handle Allwinner > D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the > reverse of what a bunch of different boards expect. > > The initial proposed solution was to allow a flexible dma-names order in > the binding, due to potential ABI breakage concerns after fixing the DTS > files. But luckily the Allwinner boards are not affected, since they are > using a shared DMA channel for rx and tx. > > Hence, the first step in fixing the inconsistency was to change > dma-names order in the binding to tx->rx. > > Do the same for the snps,dw-apb-uart nodes in the DTS file. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 951810d46307..922e8e0e2c09 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -211,7 +211,7 @@ uart0: serial@2500000 { > clocks = <&ccu CLK_BUS_UART0>; > resets = <&ccu RST_BUS_UART0>; > dmas = <&dma 14>, <&dma 14>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -224,7 +224,7 @@ uart1: serial@2500400 { > clocks = <&ccu CLK_BUS_UART1>; > resets = <&ccu RST_BUS_UART1>; > dmas = <&dma 15>, <&dma 15>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -237,7 +237,7 @@ uart2: serial@2500800 { > clocks = <&ccu CLK_BUS_UART2>; > resets = <&ccu RST_BUS_UART2>; > dmas = <&dma 16>, <&dma 16>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -250,7 +250,7 @@ uart3: serial@2500c00 { > clocks = <&ccu CLK_BUS_UART3>; > resets = <&ccu RST_BUS_UART3>; > dmas = <&dma 17>, <&dma 17>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -263,7 +263,7 @@ uart4: serial@2501000 { > clocks = <&ccu CLK_BUS_UART4>; > resets = <&ccu RST_BUS_UART4>; > dmas = <&dma 18>, <&dma 18>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -276,7 +276,7 @@ uart5: serial@2501400 { > clocks = <&ccu CLK_BUS_UART5>; > resets = <&ccu RST_BUS_UART5>; > dmas = <&dma 19>, <&dma 19>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > -- > 2.40.0 >
Dne torek, 21. marec 2023 ob 22:56:20 CEST je Cristian Ciocaltea napisal(a): > Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & > dma-names properties") documented dma-names property to handle Allwinner > D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the > reverse of what a bunch of different boards expect. > > The initial proposed solution was to allow a flexible dma-names order in > the binding, due to potential ABI breakage concerns after fixing the DTS > files. But luckily the Allwinner boards are not affected, since they are > using a shared DMA channel for rx and tx. > > Hence, the first step in fixing the inconsistency was to change > dma-names order in the binding to tx->rx. > > Do the same for the snps,dw-apb-uart nodes in the DTS file. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Applied patches 2-6, thanks! Best regards, Jernej
On 4/8/23 15:36, Jernej Škrabec wrote: > Dne torek, 21. marec 2023 ob 22:56:20 CEST je Cristian Ciocaltea napisal(a): >> Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & >> dma-names properties") documented dma-names property to handle Allwinner >> D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the >> reverse of what a bunch of different boards expect. >> >> The initial proposed solution was to allow a flexible dma-names order in >> the binding, due to potential ABI breakage concerns after fixing the DTS >> files. But luckily the Allwinner boards are not affected, since they are >> using a shared DMA channel for rx and tx. >> >> Hence, the first step in fixing the inconsistency was to change >> dma-names order in the binding to tx->rx. >> >> Do the same for the snps,dw-apb-uart nodes in the DTS file. >> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > > Applied patches 2-6, thanks! Hi Jernej, Please note the patches have been already picked by Greg and were merged in next-20230331. Regards, Cristian
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 951810d46307..922e8e0e2c09 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -211,7 +211,7 @@ uart0: serial@2500000 { clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; dmas = <&dma 14>, <&dma 14>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -224,7 +224,7 @@ uart1: serial@2500400 { clocks = <&ccu CLK_BUS_UART1>; resets = <&ccu RST_BUS_UART1>; dmas = <&dma 15>, <&dma 15>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -237,7 +237,7 @@ uart2: serial@2500800 { clocks = <&ccu CLK_BUS_UART2>; resets = <&ccu RST_BUS_UART2>; dmas = <&dma 16>, <&dma 16>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -250,7 +250,7 @@ uart3: serial@2500c00 { clocks = <&ccu CLK_BUS_UART3>; resets = <&ccu RST_BUS_UART3>; dmas = <&dma 17>, <&dma 17>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -263,7 +263,7 @@ uart4: serial@2501000 { clocks = <&ccu CLK_BUS_UART4>; resets = <&ccu RST_BUS_UART4>; dmas = <&dma 18>, <&dma 18>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -276,7 +276,7 @@ uart5: serial@2501400 { clocks = <&ccu CLK_BUS_UART5>; resets = <&ccu RST_BUS_UART5>; dmas = <&dma 19>, <&dma 19>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; };
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)