Message ID | 20230421173801.3369303-3-fei.yang@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/mtl: Define MOCS and PAT tables for MTL | expand |
On Fri, Apr 21, 2023 at 10:37:55AM -0700, fei.yang@intel.com wrote: > From: Fei Yang <fei.yang@intel.com> > > Media GT has a different base for MOCS register, need to apply > gsi_offset to the mmio address if not using the intel_uncore_r/w > functions for register access. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Fei Yang <fei.yang@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/selftest_mocs.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c > index ca009a6a13bd..a8446ab82501 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c > +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c > @@ -131,13 +131,14 @@ static int read_mocs_table(struct i915_request *rq, > const struct drm_i915_mocs_table *table, > u32 *offset) > { > + struct intel_gt *gt = rq->engine->gt; > u32 addr; > > if (!table) > return 0; > > if (HAS_GLOBAL_MOCS_REGISTERS(rq->engine->i915)) > - addr = global_mocs_offset(); > + addr = global_mocs_offset() + gt->uncore->gsi_offset; > else > addr = mocs_offset(rq->engine); > > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c index ca009a6a13bd..a8446ab82501 100644 --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c @@ -131,13 +131,14 @@ static int read_mocs_table(struct i915_request *rq, const struct drm_i915_mocs_table *table, u32 *offset) { + struct intel_gt *gt = rq->engine->gt; u32 addr; if (!table) return 0; if (HAS_GLOBAL_MOCS_REGISTERS(rq->engine->i915)) - addr = global_mocs_offset(); + addr = global_mocs_offset() + gt->uncore->gsi_offset; else addr = mocs_offset(rq->engine);