diff mbox series

[net,2/2] net: dsa: mt7530: fix network connectivity with multiple CPU ports

Message ID 20230501121538.57968-2-arinc.unal@arinc9.com (mailing list archive)
State New, archived
Headers show
Series [net,1/2] net: dsa: mt7530: fix corrupt frames using trgmii on 40 MHz XTAL MT7621 | expand

Commit Message

Arınç ÜNAL May 1, 2023, 12:15 p.m. UTC
From: Arınç ÜNAL <arinc.unal@arinc9.com>

On mt753x_cpu_port_enable() there's code that enables flooding for the CPU
port only. Since mt753x_cpu_port_enable() runs twice when both CPU ports
are enabled, port 6 becomes the only port to forward the frames to. But
port 5 is the active port, so no frames received from the user ports will
be forwarded to port 5 which breaks network connectivity.

Every bit of the BC_FFP, UNM_FFP, and UNU_FFP bits represents a port. Fix
this issue by setting the bit that corresponds to the CPU port without
overwriting the other bits.

Clear the bits beforehand only for the MT7531 switch. According to the
documents MT7621 Giga Switch Programming Guide v0.3 and MT7531 Reference
Manual for Development Board v1.0, after reset, the BC_FFP, UNM_FFP, and
UNU_FFP bits are set to 1 for MT7531, 0 for MT7530.

Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
 drivers/net/dsa/mt7530.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

Comments

Florian Fainelli May 2, 2023, 6:30 p.m. UTC | #1
On 5/1/2023 5:15 AM, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> On mt753x_cpu_port_enable() there's code that enables flooding for the CPU
> port only. Since mt753x_cpu_port_enable() runs twice when both CPU ports
> are enabled, port 6 becomes the only port to forward the frames to. But
> port 5 is the active port, so no frames received from the user ports will
> be forwarded to port 5 which breaks network connectivity.
> 
> Every bit of the BC_FFP, UNM_FFP, and UNU_FFP bits represents a port. Fix
> this issue by setting the bit that corresponds to the CPU port without
> overwriting the other bits.
> 
> Clear the bits beforehand only for the MT7531 switch. According to the
> documents MT7621 Giga Switch Programming Guide v0.3 and MT7531 Reference
> Manual for Development Board v1.0, after reset, the BC_FFP, UNM_FFP, and
> UNU_FFP bits are set to 1 for MT7531, 0 for MT7530.
> 
> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>

This tag is implied by your Signed-off-by tag. No Fixes tag for this one?
Arınç ÜNAL May 2, 2023, 8:05 p.m. UTC | #2
On 02/05/2023 21:30, Florian Fainelli wrote:
> 
> 
> On 5/1/2023 5:15 AM, arinc9.unal@gmail.com wrote:
>> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>>
>> On mt753x_cpu_port_enable() there's code that enables flooding for the 
>> CPU
>> port only. Since mt753x_cpu_port_enable() runs twice when both CPU ports
>> are enabled, port 6 becomes the only port to forward the frames to. But
>> port 5 is the active port, so no frames received from the user ports will
>> be forwarded to port 5 which breaks network connectivity.
>>
>> Every bit of the BC_FFP, UNM_FFP, and UNU_FFP bits represents a port. Fix
>> this issue by setting the bit that corresponds to the CPU port without
>> overwriting the other bits.
>>
>> Clear the bits beforehand only for the MT7531 switch. According to the
>> documents MT7621 Giga Switch Programming Guide v0.3 and MT7531 Reference
>> Manual for Development Board v1.0, after reset, the BC_FFP, UNM_FFP, and
>> UNU_FFP bits are set to 1 for MT7531, 0 for MT7530.
>>
>> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> This tag is implied by your Signed-off-by tag. No Fixes tag for this one?

I've put it with v2. Let me send v3 to remove the tested-by and add your 
reviewed-by to the other patch.

Arınç
diff mbox series

Patch

diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 7d9f9563dbda..9bc54e1348cb 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1002,9 +1002,9 @@  mt753x_cpu_port_enable(struct dsa_switch *ds, int port)
 	mt7530_write(priv, MT7530_PVC_P(port),
 		     PORT_SPEC_TAG);
 
-	/* Disable flooding by default */
-	mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK,
-		   BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port)));
+	/* Enable flooding on the CPU port */
+	mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
+		   UNU_FFP(BIT(port)));
 
 	/* Set CPU port number */
 	if (priv->id == ID_MT7621)
@@ -2367,6 +2367,10 @@  mt7531_setup_common(struct dsa_switch *ds)
 	/* Enable and reset MIB counters */
 	mt7530_mib_reset(ds);
 
+	/* Disable flooding on all ports */
+	mt7530_clear(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK |
+		     UNU_FFP_MASK);
+
 	for (i = 0; i < MT7530_NUM_PORTS; i++) {
 		/* Disable forwarding by default on all ports */
 		mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,