Message ID | 1683061382-32651-1-git-send-email-quic_khsieh@quicinc.com (mailing list archive) |
---|---|
Headers | show |
Series | add DSC 1.2 dpu supports | expand |
On 03/05/2023 00:02, Kuogee Hsieh wrote: > This series adds the DPU side changes to support DSC 1.2 encoder. This > was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor. > The DSI and DP parts will be pushed later on top of this change. > This seriel is rebase on [1], [2] and catalog fixes from [3]. Changelog?
Nit: drop leading space, use singular support*. On 2023-05-02 14:02:55, Kuogee Hsieh wrote: > This series adds the DPU side changes to support DSC 1.2 encoder. This > was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor. > The DSI and DP parts will be pushed later on top of this change. > This seriel is rebase on [1], [2] and catalog fixes from [3]. rebased* > > [1]: https://patchwork.freedesktop.org/series/116851/ > [2]: https://patchwork.freedesktop.org/series/116615/ > [3]: https://patchwork.freedesktop.org/series/112332/ Was it only rebased on the catalog fixes from my INTF TE [3] support series? I cannot get patch 2/7 of this series to apply cleanly on top of the entire INTF TE series because of a conflict with INTF TE patch 14/22 [4]. Patch 3/7 ("add DPU_PINGPONG_DSC bits into PP_BLK and PP_BLK_TE marcos") doesn't apply either, probably because I removed PP_BLK_TE entirely in that same ([4]) patch. [4]: https://lore.kernel.org/linux-arm-msm/20230411-dpu-intf-te-v4-14-27ce1a5ab5c6@somainline.org/ We should discuss in what order the series are going to be picked, so that it is all compatible. - Marijn > Abhinav Kumar (2): > drm/msm/dpu: add dsc blocks for remaining chipsets in catalog > drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets > > Kuogee Hsieh (5): > drm/msm/dpu: add DPU_PINGPONG_DSC feature bit > drm/msm/dpu: add DPU_PINGPONG_DSC bits into PP_BLK and PP_BLK_TE > marcos > drm/msm/dpu: add PINGPONG_NONE to disconnect DSC from PINGPONG > drm/msm/dpu: add support for DSC encoder v1.2 engine > drm/msm/dpu: separate DSC flush update out of interface > > drivers/gpu/drm/msm/Makefile | 1 + > .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 19 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 8 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 26 +- > .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 35 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 26 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +- > .../drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 14 + > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 7 + > .../drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 + > .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 14 + > .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 14 + > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 35 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 36 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 22 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 10 + > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 7 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 15 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c | 383 +++++++++++++++++++++ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 9 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 +- > 25 files changed, 649 insertions(+), 82 deletions(-) > create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >