Message ID | 168319291781.1159309.7376486961333644798.stgit@ltc-boston1.aus.stglabs.ibm.com (mailing list archive) |
---|---|
Headers | show |
Series | tcg: ppc64: Fix mask generation for vextractdm | expand |
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/4/23 06:35, Shivaprasad G Bhat wrote: > While debugging gitlab issue[1] 1536, I happen to try the > vextract[X]m instructions on the real hardware. The test > used in [1] is failing for vextractdm. > > On debugging it is seen, in function do_extractm() the > mask is calculated as dup_const(1 << (element_width - 1)). > '1' being signed int works fine for MO_8,16,32. For MO_64, > on PPC64 host this ends up becoming 0 on compilation. The > vextractdm uses MO_64, and it ends up having mask as 0. > > The first patch here fixes that by explicitly using > 1ULL instead of signed int 1 like its used everywhere else. > Second patch introduces the test case from [1] into qemu > tcg/ppc64 along with fixes/tweaks to make it work for both > big and little-endian targets. > > References: > [1] : https://gitlab.com/qemu-project/qemu/-/issues/1536 > > --- > Changelog: > Since v1 : https://lists.gnu.org/archive/html/qemu-devel/2023-04/msg01958.html > - Added "Resolves: " to first patch description > - Rebased to top of the tree. I see with d044b7c33a5, Alex has limited the > scope of plugin tests to just the MULTIARCH_TESTS. So, removed the plugin > tests for the test case added in the second patch. > - Changed the test case to use the HOST_BIG_ENDIAN from compiler.h > > Shivaprasad G Bhat (2): > tcg: ppc64: Fix mask generation for vextractdm > tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions > > > target/ppc/translate/vmx-impl.c.inc | 2 +- > tests/tcg/ppc64/Makefile.target | 6 +++- > tests/tcg/ppc64/vector.c | 51 +++++++++++++++++++++++++++++ > 3 files changed, 57 insertions(+), 2 deletions(-) > create mode 100644 tests/tcg/ppc64/vector.c > > -- > Signature >