| Message ID | 20230504153511.4007320-8-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: move DSC RC tables to drm_dsc_helper.c | expand |
On 5/4/2023 8:35 AM, Dmitry Baryshkov wrote: > DSC model contains pre-SCR RC parameters for other bpp/bpc combinations, > include them here for completeness. The values were generated from the > 'pre_scr_cfg_files_for_reference' files found in DSC models 20210623. > The same fileset is a part of DSC model 20161212. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> I checked these pre-SCR values against DSC model 20161212 and they look good to me. Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> > --- > drivers/gpu/drm/display/drm_dsc_helper.c | 72 ++++++++++++++++++++++++ > 1 file changed, 72 insertions(+) > > diff --git a/drivers/gpu/drm/display/drm_dsc_helper.c b/drivers/gpu/drm/display/drm_dsc_helper.c > index 35b39f3109c4..aec6f8c201af 100644 > --- a/drivers/gpu/drm/display/drm_dsc_helper.c > +++ b/drivers/gpu/drm/display/drm_dsc_helper.c > @@ -325,6 +325,16 @@ struct rc_parameters_data { > #define DSC_BPP(bpp) ((bpp) << 4) > > static const struct rc_parameters_data rc_parameters_pre_scr[] = { > + { > + .bpp = DSC_BPP(6), .bpc = 8, > + { 683, 15, 6144, 3, 13, 11, 11, { > + { 0, 2, 0 }, { 1, 4, -2 }, { 3, 6, -2 }, { 4, 6, -4 }, > + { 5, 7, -6 }, { 5, 7, -6 }, { 6, 7, -6 }, { 6, 8, -8 }, > + { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, { 10, 12, -12 }, > + { 10, 13, -12 }, { 12, 14, -12 }, { 15, 15, -12 } > + } > + } > + }, > { > .bpp = DSC_BPP(8), .bpc = 8, > { 512, 12, 6144, 3, 12, 11, 11, { > @@ -360,6 +370,37 @@ static const struct rc_parameters_data rc_parameters_pre_scr[] = { > } > } > }, > + { > + .bpp = DSC_BPP(10), .bpc = 8, > + { 410, 12, 5632, 3, 12, 11, 11, { > + { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, > + { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, > + { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 11, -10 }, > + { 5, 12, -12 }, { 7, 13, -12 }, { 13, 15, -12 } > + } > + } > + }, > + { > + .bpp = DSC_BPP(10), .bpc = 10, > + { 410, 12, 5632, 7, 16, 15, 15, { > + { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, > + { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, > + { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 15, -10 }, > + { 9, 16, -12 }, { 11, 17, -12 }, { 17, 19, -12 } > + } > + } > + }, > + { > + .bpp = DSC_BPP(10), .bpc = 12, > + { 410, 12, 5632, 11, 20, 19, 19, { > + { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, > + { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, > + { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, > + { 13, 19, -10 }, { 13, 20, -12 }, { 15, 21, -12 }, > + { 21, 23, -12 } > + } > + } > + }, > { > .bpp = DSC_BPP(12), .bpc = 8, > { 341, 15, 2048, 3, 12, 11, 11, { > @@ -391,6 +432,37 @@ static const struct rc_parameters_data rc_parameters_pre_scr[] = { > } > } > }, > + { > + .bpp = DSC_BPP(15), .bpc = 8, > + { 273, 15, 2048, 3, 12, 11, 11, { > + { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, > + { 1, 2, 2 }, { 1, 3, 0 }, { 1, 4, -2 }, { 2, 4, -4 }, > + { 3, 4, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 5, 7, -10 }, > + { 5, 8, -12 }, { 7, 13, -12 }, { 13, 15, -12 } > + } > + } > + }, > + { > + .bpp = DSC_BPP(15), .bpc = 10, > + { 273, 15, 2048, 7, 16, 15, 15, { > + { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, > + { 5, 6, 2 }, { 5, 7, 0 }, { 5, 8, -2 }, { 6, 8, -4 }, > + { 7, 8, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, > + { 9, 12, -12 }, { 11, 17, -12 }, { 17, 19, -12 } > + } > + } > + }, > + { > + .bpp = DSC_BPP(15), .bpc = 12, > + { 273, 15, 2048, 11, 20, 19, 19, { > + { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, > + { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, > + { 11, 12, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, > + { 13, 15, -10 }, { 13, 16, -12 }, { 15, 21, -12 }, > + { 21, 23, -12 } > + } > + } > + }, > { /* sentinel */ } > }; > > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/display/drm_dsc_helper.c b/drivers/gpu/drm/display/drm_dsc_helper.c index 35b39f3109c4..aec6f8c201af 100644 --- a/drivers/gpu/drm/display/drm_dsc_helper.c +++ b/drivers/gpu/drm/display/drm_dsc_helper.c @@ -325,6 +325,16 @@ struct rc_parameters_data { #define DSC_BPP(bpp) ((bpp) << 4) static const struct rc_parameters_data rc_parameters_pre_scr[] = { + { + .bpp = DSC_BPP(6), .bpc = 8, + { 683, 15, 6144, 3, 13, 11, 11, { + { 0, 2, 0 }, { 1, 4, -2 }, { 3, 6, -2 }, { 4, 6, -4 }, + { 5, 7, -6 }, { 5, 7, -6 }, { 6, 7, -6 }, { 6, 8, -8 }, + { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, { 10, 12, -12 }, + { 10, 13, -12 }, { 12, 14, -12 }, { 15, 15, -12 } + } + } + }, { .bpp = DSC_BPP(8), .bpc = 8, { 512, 12, 6144, 3, 12, 11, 11, { @@ -360,6 +370,37 @@ static const struct rc_parameters_data rc_parameters_pre_scr[] = { } } }, + { + .bpp = DSC_BPP(10), .bpc = 8, + { 410, 12, 5632, 3, 12, 11, 11, { + { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, + { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, + { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 11, -10 }, + { 5, 12, -12 }, { 7, 13, -12 }, { 13, 15, -12 } + } + } + }, + { + .bpp = DSC_BPP(10), .bpc = 10, + { 410, 12, 5632, 7, 16, 15, 15, { + { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, + { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, + { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 15, -10 }, + { 9, 16, -12 }, { 11, 17, -12 }, { 17, 19, -12 } + } + } + }, + { + .bpp = DSC_BPP(10), .bpc = 12, + { 410, 12, 5632, 11, 20, 19, 19, { + { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, + { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, + { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, + { 13, 19, -10 }, { 13, 20, -12 }, { 15, 21, -12 }, + { 21, 23, -12 } + } + } + }, { .bpp = DSC_BPP(12), .bpc = 8, { 341, 15, 2048, 3, 12, 11, 11, { @@ -391,6 +432,37 @@ static const struct rc_parameters_data rc_parameters_pre_scr[] = { } } }, + { + .bpp = DSC_BPP(15), .bpc = 8, + { 273, 15, 2048, 3, 12, 11, 11, { + { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, + { 1, 2, 2 }, { 1, 3, 0 }, { 1, 4, -2 }, { 2, 4, -4 }, + { 3, 4, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 5, 7, -10 }, + { 5, 8, -12 }, { 7, 13, -12 }, { 13, 15, -12 } + } + } + }, + { + .bpp = DSC_BPP(15), .bpc = 10, + { 273, 15, 2048, 7, 16, 15, 15, { + { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, + { 5, 6, 2 }, { 5, 7, 0 }, { 5, 8, -2 }, { 6, 8, -4 }, + { 7, 8, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, + { 9, 12, -12 }, { 11, 17, -12 }, { 17, 19, -12 } + } + } + }, + { + .bpp = DSC_BPP(15), .bpc = 12, + { 273, 15, 2048, 11, 20, 19, 19, { + { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, + { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, + { 11, 12, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, + { 13, 15, -10 }, { 13, 16, -12 }, { 15, 21, -12 }, + { 21, 23, -12 } + } + } + }, { /* sentinel */ } };
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations, include them here for completeness. The values were generated from the 'pre_scr_cfg_files_for_reference' files found in DSC models 20210623. The same fileset is a part of DSC model 20161212. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/display/drm_dsc_helper.c | 72 ++++++++++++++++++++++++ 1 file changed, 72 insertions(+)