| Message ID | 168357887373.2756219.10680050253858860934.stgit@djiang5-mobl3 |
|---|---|
| State | Superseded |
| Headers | show |
| Series | cxl: Add support for QTG ID retrieval for CXL subsystem | expand |
On Mon, 08 May 2023 13:47:53 -0700 Dave Jiang <dave.jiang@intel.com> wrote: > Move the enumeration of device capacity to cxl_port_probe() from > cxl_pci_probe(). The size and capacity information should be read > after cxl_await_media_ready() so the data is valid. > > Fixes: 5e2411ae8071 ("cxl/memdev: Change cxl_mem to a more descriptive name") > Signed-off-by: Dave Jiang <dave.jiang@intel.com> Same comment about this should be at top of patch set, not buried down at patch 10. Change seems fine Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/cxl/pci.c | 8 -------- > drivers/cxl/port.c | 8 ++++++++ > 2 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c > index ed39d133b70d..06324266eae8 100644 > --- a/drivers/cxl/pci.c > +++ b/drivers/cxl/pci.c > @@ -707,14 +707,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) > if (rc) > return rc; > > - rc = cxl_dev_state_identify(cxlds); > - if (rc) > - return rc; > - > - rc = cxl_mem_create_range_info(cxlds); > - if (rc) > - return rc; > - > rc = cxl_alloc_irq_vectors(pdev); > if (rc) > return rc; > diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c > index b474997cc7ee..0bdb9d73a389 100644 > --- a/drivers/cxl/port.c > +++ b/drivers/cxl/port.c > @@ -180,6 +180,14 @@ static int cxl_endpoint_port_probe(struct cxl_port *port) > return rc; > } > > + rc = cxl_dev_state_identify(cxlds); > + if (rc) > + return rc; > + > + rc = cxl_mem_create_range_info(cxlds); > + if (rc) > + return rc; > + > rc = devm_cxl_enumerate_decoders(cxlhdm, &info); > if (rc) > return rc; > >
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index ed39d133b70d..06324266eae8 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -707,14 +707,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) return rc; - rc = cxl_dev_state_identify(cxlds); - if (rc) - return rc; - - rc = cxl_mem_create_range_info(cxlds); - if (rc) - return rc; - rc = cxl_alloc_irq_vectors(pdev); if (rc) return rc; diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index b474997cc7ee..0bdb9d73a389 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -180,6 +180,14 @@ static int cxl_endpoint_port_probe(struct cxl_port *port) return rc; } + rc = cxl_dev_state_identify(cxlds); + if (rc) + return rc; + + rc = cxl_mem_create_range_info(cxlds); + if (rc) + return rc; + rc = devm_cxl_enumerate_decoders(cxlhdm, &info); if (rc) return rc;
Move the enumeration of device capacity to cxl_port_probe() from cxl_pci_probe(). The size and capacity information should be read after cxl_await_media_ready() so the data is valid. Fixes: 5e2411ae8071 ("cxl/memdev: Change cxl_mem to a more descriptive name") Signed-off-by: Dave Jiang <dave.jiang@intel.com> --- drivers/cxl/pci.c | 8 -------- drivers/cxl/port.c | 8 ++++++++ 2 files changed, 8 insertions(+), 8 deletions(-)