diff mbox series

[v2] dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC

Message ID 20230310111630.743023-1-s-vadapalli@ti.com (mailing list archive)
State New, archived
Headers show
Series [v2] dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC | expand

Commit Message

s-vadapalli March 10, 2023, 11:16 a.m. UTC 
From: Matt Ranostay <mranostay@ti.com>

There are 4 lanes in the single instance of J784S4 SERDES. Each SERDES
lane mux can select up to 4 different IPs. Define all the possible
functions.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

Changes from v1:
1. Collect Acked-by tag from Krzysztof Kozlowski.
2. Rebase on to linux-next tagged: next-20230310.

v1:
https://lore.kernel.org/r/20221015055024.191855-1-mranostay@ti.com/

 include/dt-bindings/mux/ti-serdes.h | 62 +++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

Comments

s-vadapalli May 16, 2023, 4:40 a.m. UTC | #1 
Peter,

Can this patch please be merged in case of no issues? It applies cleanly on
linux-next tagged next-20230516.

On 10/03/23 16:46, Siddharth Vadapalli wrote:
> From: Matt Ranostay <mranostay@ti.com>
> 
> There are 4 lanes in the single instance of J784S4 SERDES. Each SERDES
> lane mux can select up to 4 different IPs. Define all the possible
> functions.
> 
> Signed-off-by: Matt Ranostay <mranostay@ti.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> 
> Changes from v1:
> 1. Collect Acked-by tag from Krzysztof Kozlowski.
> 2. Rebase on to linux-next tagged: next-20230310.
> 
> v1:
> https://lore.kernel.org/r/20221015055024.191855-1-mranostay@ti.com/
> 
>  include/dt-bindings/mux/ti-serdes.h | 62 +++++++++++++++++++++++++++++
>  1 file changed, 62 insertions(+)
> 
> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
> index d3116c52ab72..669ca2d6abce 100644
> --- a/include/dt-bindings/mux/ti-serdes.h
> +++ b/include/dt-bindings/mux/ti-serdes.h
> @@ -117,4 +117,66 @@
>  #define J721S2_SERDES0_LANE3_USB		0x2
>  #define J721S2_SERDES0_LANE3_IP4_UNUSED		0x3
>  
> +/* J784S4 */
> +
> +#define J784S4_SERDES0_LANE0_IP1_UNUSED		0x0
> +#define J784S4_SERDES0_LANE0_PCIE1_LANE0	0x1
> +#define J784S4_SERDES0_LANE0_IP3_UNUSED		0x2
> +#define J784S4_SERDES0_LANE0_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES0_LANE1_IP1_UNUSED		0x0
> +#define J784S4_SERDES0_LANE1_PCIE1_LANE1	0x1
> +#define J784S4_SERDES0_LANE1_IP3_UNUSED		0x2
> +#define J784S4_SERDES0_LANE1_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES0_LANE2_PCIE3_LANE0	0x0
> +#define J784S4_SERDES0_LANE2_PCIE1_LANE2	0x1
> +#define J784S4_SERDES0_LANE2_IP3_UNUSED		0x2
> +#define J784S4_SERDES0_LANE2_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES0_LANE3_PCIE3_LANE1	0x0
> +#define J784S4_SERDES0_LANE3_PCIE1_LANE3	0x1
> +#define J784S4_SERDES0_LANE3_USB		0x2
> +#define J784S4_SERDES0_LANE3_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES1_LANE0_QSGMII_LANE3	0x0
> +#define J784S4_SERDES1_LANE0_PCIE0_LANE0	0x1
> +#define J784S4_SERDES1_LANE0_IP3_UNUSED		0x2
> +#define J784S4_SERDES1_LANE0_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES1_LANE1_QSGMII_LANE4	0x0
> +#define J784S4_SERDES1_LANE1_PCIE0_LANE1	0x1
> +#define J784S4_SERDES1_LANE1_IP3_UNUSED		0x2
> +#define J784S4_SERDES1_LANE1_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES1_LANE2_QSGMII_LANE1	0x0
> +#define J784S4_SERDES1_LANE2_PCIE0_LANE2	0x1
> +#define J784S4_SERDES1_LANE2_PCIE2_LANE0	0x2
> +#define J784S4_SERDES1_LANE2_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES1_LANE3_QSGMII_LANE2	0x0
> +#define J784S4_SERDES1_LANE3_PCIE0_LANE3	0x1
> +#define J784S4_SERDES1_LANE3_PCIE2_LANE1	0x2
> +#define J784S4_SERDES1_LANE3_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES2_LANE0_QSGMII_LANE5	0x0
> +#define J784S4_SERDES2_LANE0_IP2_UNUSED		0x1
> +#define J784S4_SERDES2_LANE0_IP3_UNUSED		0x2
> +#define J784S4_SERDES2_LANE0_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES2_LANE1_QSGMII_LANE6	0x0
> +#define J784S4_SERDES2_LANE1_IP2_UNUSED		0x1
> +#define J784S4_SERDES2_LANE1_IP3_UNUSED		0x2
> +#define J784S4_SERDES2_LANE1_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES2_LANE2_QSGMII_LANE7	0x0
> +#define J784S4_SERDES2_LANE2_QSGMII_LANE1	0x1
> +#define J784S4_SERDES2_LANE2_IP3_UNUSED		0x2
> +#define J784S4_SERDES2_LANE2_IP4_UNUSED		0x3
> +
> +#define J784S4_SERDES2_LANE3_QSGMII_LANE8	0x0
> +#define J784S4_SERDES2_LANE3_QSGMII_LANE2	0x1
> +#define J784S4_SERDES2_LANE3_IP3_UNUSED		0x2
> +#define J784S4_SERDES2_LANE3_IP4_UNUSED		0x3
> +
>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */
Peter Rosin May 24, 2023, 8:21 a.m. UTC | #2 
Hi!

2023-05-16 at 06:40, Siddharth Vadapalli wrote:
> Peter,
> 
> Can this patch please be merged in case of no issues? It applies cleanly on
> linux-next tagged next-20230516.

Sorry for being slow, but this is now finally on its way to linux-next.

Cheers,
Peter

> On 10/03/23 16:46, Siddharth Vadapalli wrote:
>> From: Matt Ranostay <mranostay@ti.com>
>>
>> There are 4 lanes in the single instance of J784S4 SERDES. Each SERDES
>> lane mux can select up to 4 different IPs. Define all the possible
>> functions.
>>
>> Signed-off-by: Matt Ranostay <mranostay@ti.com>
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>>
>> Changes from v1:
>> 1. Collect Acked-by tag from Krzysztof Kozlowski.
>> 2. Rebase on to linux-next tagged: next-20230310.
>>
>> v1:
>> https://lore.kernel.org/r/20221015055024.191855-1-mranostay@ti.com/
>>
>>  include/dt-bindings/mux/ti-serdes.h | 62 +++++++++++++++++++++++++++++
>>  1 file changed, 62 insertions(+)
>>
>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
>> index d3116c52ab72..669ca2d6abce 100644
>> --- a/include/dt-bindings/mux/ti-serdes.h
>> +++ b/include/dt-bindings/mux/ti-serdes.h
>> @@ -117,4 +117,66 @@
>>  #define J721S2_SERDES0_LANE3_USB		0x2
>>  #define J721S2_SERDES0_LANE3_IP4_UNUSED		0x3
>>  
>> +/* J784S4 */
>> +
>> +#define J784S4_SERDES0_LANE0_IP1_UNUSED		0x0
>> +#define J784S4_SERDES0_LANE0_PCIE1_LANE0	0x1

...
diff mbox series

Patch

diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index d3116c52ab72..669ca2d6abce 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -117,4 +117,66 @@ 
 #define J721S2_SERDES0_LANE3_USB		0x2
 #define J721S2_SERDES0_LANE3_IP4_UNUSED		0x3
 
+/* J784S4 */
+
+#define J784S4_SERDES0_LANE0_IP1_UNUSED		0x0
+#define J784S4_SERDES0_LANE0_PCIE1_LANE0	0x1
+#define J784S4_SERDES0_LANE0_IP3_UNUSED		0x2
+#define J784S4_SERDES0_LANE0_IP4_UNUSED		0x3
+
+#define J784S4_SERDES0_LANE1_IP1_UNUSED		0x0
+#define J784S4_SERDES0_LANE1_PCIE1_LANE1	0x1
+#define J784S4_SERDES0_LANE1_IP3_UNUSED		0x2
+#define J784S4_SERDES0_LANE1_IP4_UNUSED		0x3
+
+#define J784S4_SERDES0_LANE2_PCIE3_LANE0	0x0
+#define J784S4_SERDES0_LANE2_PCIE1_LANE2	0x1
+#define J784S4_SERDES0_LANE2_IP3_UNUSED		0x2
+#define J784S4_SERDES0_LANE2_IP4_UNUSED		0x3
+
+#define J784S4_SERDES0_LANE3_PCIE3_LANE1	0x0
+#define J784S4_SERDES0_LANE3_PCIE1_LANE3	0x1
+#define J784S4_SERDES0_LANE3_USB		0x2
+#define J784S4_SERDES0_LANE3_IP4_UNUSED		0x3
+
+#define J784S4_SERDES1_LANE0_QSGMII_LANE3	0x0
+#define J784S4_SERDES1_LANE0_PCIE0_LANE0	0x1
+#define J784S4_SERDES1_LANE0_IP3_UNUSED		0x2
+#define J784S4_SERDES1_LANE0_IP4_UNUSED		0x3
+
+#define J784S4_SERDES1_LANE1_QSGMII_LANE4	0x0
+#define J784S4_SERDES1_LANE1_PCIE0_LANE1	0x1
+#define J784S4_SERDES1_LANE1_IP3_UNUSED		0x2
+#define J784S4_SERDES1_LANE1_IP4_UNUSED		0x3
+
+#define J784S4_SERDES1_LANE2_QSGMII_LANE1	0x0
+#define J784S4_SERDES1_LANE2_PCIE0_LANE2	0x1
+#define J784S4_SERDES1_LANE2_PCIE2_LANE0	0x2
+#define J784S4_SERDES1_LANE2_IP4_UNUSED		0x3
+
+#define J784S4_SERDES1_LANE3_QSGMII_LANE2	0x0
+#define J784S4_SERDES1_LANE3_PCIE0_LANE3	0x1
+#define J784S4_SERDES1_LANE3_PCIE2_LANE1	0x2
+#define J784S4_SERDES1_LANE3_IP4_UNUSED		0x3
+
+#define J784S4_SERDES2_LANE0_QSGMII_LANE5	0x0
+#define J784S4_SERDES2_LANE0_IP2_UNUSED		0x1
+#define J784S4_SERDES2_LANE0_IP3_UNUSED		0x2
+#define J784S4_SERDES2_LANE0_IP4_UNUSED		0x3
+
+#define J784S4_SERDES2_LANE1_QSGMII_LANE6	0x0
+#define J784S4_SERDES2_LANE1_IP2_UNUSED		0x1
+#define J784S4_SERDES2_LANE1_IP3_UNUSED		0x2
+#define J784S4_SERDES2_LANE1_IP4_UNUSED		0x3
+
+#define J784S4_SERDES2_LANE2_QSGMII_LANE7	0x0
+#define J784S4_SERDES2_LANE2_QSGMII_LANE1	0x1
+#define J784S4_SERDES2_LANE2_IP3_UNUSED		0x2
+#define J784S4_SERDES2_LANE2_IP4_UNUSED		0x3
+
+#define J784S4_SERDES2_LANE3_QSGMII_LANE8	0x0
+#define J784S4_SERDES2_LANE3_QSGMII_LANE2	0x1
+#define J784S4_SERDES2_LANE3_IP3_UNUSED		0x2
+#define J784S4_SERDES2_LANE3_IP4_UNUSED		0x3
+
 #endif /* _DT_BINDINGS_MUX_TI_SERDES */