Message ID | 20230519062137.1251741-1-tommy.wu@sifive.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | hw/dma/xilinx_axidma: Check DMASR.HALTED to prevent infinite loop. | expand |
On Fri, May 19, 2023 at 8:21 AM Tommy Wu <tommy.wu@sifive.com> wrote: > When we receive a packet from the xilinx_axienet and then try to s2mem > through the xilinx_axidma, if the descriptor ring buffer is full in the > xilinx axidma driver, we’ll assert the DMASR.HALTED in the > function : stream_process_s2mem and return 0. In the end, we’ll be stuck in > an infinite loop in axienet_eth_rx_notify. > > This patch checks the DMASR.HALTED state when we try to push data > from xilinx axi-enet to xilinx axi-dma. When the DMASR.HALTED is asserted, > we will not keep pushing the data and then prevent the infinte loop. > > Signed-off-by: Tommy Wu <tommy.wu@sifive.com> > --- > hw/dma/xilinx_axidma.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c > index 6030c76435..12c90267df 100644 > --- a/hw/dma/xilinx_axidma.c > +++ b/hw/dma/xilinx_axidma.c > @@ -168,6 +168,11 @@ static inline int stream_idle(struct Stream *s) > return !!(s->regs[R_DMASR] & DMASR_IDLE); > } > > +static inline int stream_halted(struct Stream *s) > At some point we should probably change all of these helpers to return booleans... Anyway, this fix looks good to me: Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> > +{ > + return !!(s->regs[R_DMASR] & DMASR_HALTED); > +} > + > static void stream_reset(struct Stream *s) > { > s->regs[R_DMASR] = DMASR_HALTED; /* starts up halted. */ > @@ -269,7 +274,7 @@ static void stream_process_mem2s(struct Stream *s, > StreamSink *tx_data_dev, > uint64_t addr; > bool eop; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > return; > } > > @@ -326,7 +331,7 @@ static size_t stream_process_s2mem(struct Stream *s, > unsigned char *buf, > unsigned int rxlen; > size_t pos = 0; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > return 0; > } > > @@ -407,7 +412,7 @@ xilinx_axidma_data_stream_can_push(StreamSink *obj, > XilinxAXIDMAStreamSink *ds = XILINX_AXI_DMA_DATA_STREAM(obj); > struct Stream *s = &ds->dma->streams[1]; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > ds->dma->notify = notify; > ds->dma->notify_opaque = notify_opaque; > return false; > -- > 2.31.1 > >
Thank Edgar E. Iglesias for the advice. I can submit another patch to do that. On Fri, May 19, 2023 at 2:39 PM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > > On Fri, May 19, 2023 at 8:21 AM Tommy Wu <tommy.wu@sifive.com> wrote: > >> When we receive a packet from the xilinx_axienet and then try to s2mem >> through the xilinx_axidma, if the descriptor ring buffer is full in the >> xilinx axidma driver, we’ll assert the DMASR.HALTED in the >> function : stream_process_s2mem and return 0. In the end, we’ll be stuck >> in >> an infinite loop in axienet_eth_rx_notify. >> >> This patch checks the DMASR.HALTED state when we try to push data >> from xilinx axi-enet to xilinx axi-dma. When the DMASR.HALTED is asserted, >> we will not keep pushing the data and then prevent the infinte loop. >> >> Signed-off-by: Tommy Wu <tommy.wu@sifive.com> >> --- >> hw/dma/xilinx_axidma.c | 11 ++++++++--- >> 1 file changed, 8 insertions(+), 3 deletions(-) >> >> diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c >> index 6030c76435..12c90267df 100644 >> --- a/hw/dma/xilinx_axidma.c >> +++ b/hw/dma/xilinx_axidma.c >> @@ -168,6 +168,11 @@ static inline int stream_idle(struct Stream *s) >> return !!(s->regs[R_DMASR] & DMASR_IDLE); >> } >> >> +static inline int stream_halted(struct Stream *s) >> > > At some point we should probably change all of these helpers to return > booleans... > Anyway, this fix looks good to me: > > Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> > > > > >> +{ >> + return !!(s->regs[R_DMASR] & DMASR_HALTED); >> +} >> + >> static void stream_reset(struct Stream *s) >> { >> s->regs[R_DMASR] = DMASR_HALTED; /* starts up halted. */ >> @@ -269,7 +274,7 @@ static void stream_process_mem2s(struct Stream *s, >> StreamSink *tx_data_dev, >> uint64_t addr; >> bool eop; >> >> - if (!stream_running(s) || stream_idle(s)) { >> + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { >> return; >> } >> >> @@ -326,7 +331,7 @@ static size_t stream_process_s2mem(struct Stream *s, >> unsigned char *buf, >> unsigned int rxlen; >> size_t pos = 0; >> >> - if (!stream_running(s) || stream_idle(s)) { >> + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { >> return 0; >> } >> >> @@ -407,7 +412,7 @@ xilinx_axidma_data_stream_can_push(StreamSink *obj, >> XilinxAXIDMAStreamSink *ds = XILINX_AXI_DMA_DATA_STREAM(obj); >> struct Stream *s = &ds->dma->streams[1]; >> >> - if (!stream_running(s) || stream_idle(s)) { >> + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { >> ds->dma->notify = notify; >> ds->dma->notify_opaque = notify_opaque; >> return false; >> -- >> 2.31.1 >> >>
Reviewed-by: Frank Chang <frank.chang@sifive.com> On Fri, May 19, 2023 at 2:23 PM Tommy Wu <tommy.wu@sifive.com> wrote: > When we receive a packet from the xilinx_axienet and then try to s2mem > through the xilinx_axidma, if the descriptor ring buffer is full in the > xilinx axidma driver, we’ll assert the DMASR.HALTED in the > function : stream_process_s2mem and return 0. In the end, we’ll be stuck in > an infinite loop in axienet_eth_rx_notify. > > This patch checks the DMASR.HALTED state when we try to push data > from xilinx axi-enet to xilinx axi-dma. When the DMASR.HALTED is asserted, > we will not keep pushing the data and then prevent the infinte loop. > > Signed-off-by: Tommy Wu <tommy.wu@sifive.com> > --- > hw/dma/xilinx_axidma.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c > index 6030c76435..12c90267df 100644 > --- a/hw/dma/xilinx_axidma.c > +++ b/hw/dma/xilinx_axidma.c > @@ -168,6 +168,11 @@ static inline int stream_idle(struct Stream *s) > return !!(s->regs[R_DMASR] & DMASR_IDLE); > } > > +static inline int stream_halted(struct Stream *s) > +{ > + return !!(s->regs[R_DMASR] & DMASR_HALTED); > +} > + > static void stream_reset(struct Stream *s) > { > s->regs[R_DMASR] = DMASR_HALTED; /* starts up halted. */ > @@ -269,7 +274,7 @@ static void stream_process_mem2s(struct Stream *s, > StreamSink *tx_data_dev, > uint64_t addr; > bool eop; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > return; > } > > @@ -326,7 +331,7 @@ static size_t stream_process_s2mem(struct Stream *s, > unsigned char *buf, > unsigned int rxlen; > size_t pos = 0; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > return 0; > } > > @@ -407,7 +412,7 @@ xilinx_axidma_data_stream_can_push(StreamSink *obj, > XilinxAXIDMAStreamSink *ds = XILINX_AXI_DMA_DATA_STREAM(obj); > struct Stream *s = &ds->dma->streams[1]; > > - if (!stream_running(s) || stream_idle(s)) { > + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { > ds->dma->notify = notify; > ds->dma->notify_opaque = notify_opaque; > return false; > -- > 2.31.1 > > >
On Fri, 19 May 2023 at 07:21, Tommy Wu <tommy.wu@sifive.com> wrote: > > When we receive a packet from the xilinx_axienet and then try to s2mem > through the xilinx_axidma, if the descriptor ring buffer is full in the > xilinx axidma driver, we’ll assert the DMASR.HALTED in the > function : stream_process_s2mem and return 0. In the end, we’ll be stuck in > an infinite loop in axienet_eth_rx_notify. > > This patch checks the DMASR.HALTED state when we try to push data > from xilinx axi-enet to xilinx axi-dma. When the DMASR.HALTED is asserted, > we will not keep pushing the data and then prevent the infinte loop. > > Signed-off-by: Tommy Wu <tommy.wu@sifive.com> Applied to target-arm.next, thanks. -- PMM
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 6030c76435..12c90267df 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -168,6 +168,11 @@ static inline int stream_idle(struct Stream *s) return !!(s->regs[R_DMASR] & DMASR_IDLE); } +static inline int stream_halted(struct Stream *s) +{ + return !!(s->regs[R_DMASR] & DMASR_HALTED); +} + static void stream_reset(struct Stream *s) { s->regs[R_DMASR] = DMASR_HALTED; /* starts up halted. */ @@ -269,7 +274,7 @@ static void stream_process_mem2s(struct Stream *s, StreamSink *tx_data_dev, uint64_t addr; bool eop; - if (!stream_running(s) || stream_idle(s)) { + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { return; } @@ -326,7 +331,7 @@ static size_t stream_process_s2mem(struct Stream *s, unsigned char *buf, unsigned int rxlen; size_t pos = 0; - if (!stream_running(s) || stream_idle(s)) { + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { return 0; } @@ -407,7 +412,7 @@ xilinx_axidma_data_stream_can_push(StreamSink *obj, XilinxAXIDMAStreamSink *ds = XILINX_AXI_DMA_DATA_STREAM(obj); struct Stream *s = &ds->dma->streams[1]; - if (!stream_running(s) || stream_idle(s)) { + if (!stream_running(s) || stream_idle(s) || stream_halted(s)) { ds->dma->notify = notify; ds->dma->notify_opaque = notify_opaque; return false;
When we receive a packet from the xilinx_axienet and then try to s2mem through the xilinx_axidma, if the descriptor ring buffer is full in the xilinx axidma driver, we’ll assert the DMASR.HALTED in the function : stream_process_s2mem and return 0. In the end, we’ll be stuck in an infinite loop in axienet_eth_rx_notify. This patch checks the DMASR.HALTED state when we try to push data from xilinx axi-enet to xilinx axi-dma. When the DMASR.HALTED is asserted, we will not keep pushing the data and then prevent the infinte loop. Signed-off-by: Tommy Wu <tommy.wu@sifive.com> --- hw/dma/xilinx_axidma.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)