| Message ID | 20230421223157.115367-1-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: mediatek: add missing cache properties | expand |
On 22/04/2023 00:31, Krzysztof Kozlowski wrote: > As all level 2 and level 3 caches are unified, add required > cache-unified properties to fix warnings like: > > mt7622-rfb1.dtb: l2-cache: 'cache-unified' is a required property > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- Hi Matthias, Could you grab this one? Best regards, Krzysztof
On 16/05/2023 18:32, Krzysztof Kozlowski wrote: > On 22/04/2023 00:31, Krzysztof Kozlowski wrote: >> As all level 2 and level 3 caches are unified, add required >> cache-unified properties to fix warnings like: >> >> mt7622-rfb1.dtb: l2-cache: 'cache-unified' is a required property >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> --- > > Hi Matthias, > > Could you grab this one? > Applied now, thanks!
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 006cd639059f..36ef2dbe8add 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -101,6 +101,7 @@ cpu1: cpu@1 { L2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 5e83d4e9efa4..d4f9a9b6bca8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -250,6 +250,7 @@ l2_0: l2-cache0 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l2_1: l2-cache1 { @@ -259,6 +260,7 @@ l2_1: l2-cache1 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l3_0: l3-cache { diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 5c30caf74026..faaff39155dc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -228,6 +228,7 @@ l2_0: l2-cache0 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l2_1: l2-cache1 { @@ -237,6 +238,7 @@ l2_1: l2-cache1 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l3_0: l3-cache { diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a44aae4ab953..eee3160e7901 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -283,6 +283,7 @@ l2_0: l2-cache0 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l2_1: l2-cache1 { @@ -292,6 +293,7 @@ l2_1: l2-cache1 { cache-line-size = <64>; cache-sets = <512>; next-level-cache = <&l3_0>; + cache-unified; }; l3_0: l3-cache {
As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: mt7622-rfb1.dtb: l2-cache: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Please take the patch via sub-arch SoC tree. --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + arch/arm64/boot/dts/mediatek/mt8186.dtsi | 2 ++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++ 4 files changed, 7 insertions(+)