| Message ID | 20230517135754.1110291-1-tejas.upadhyay@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V2] drm/i915/gem: Use large rings for compute contexts | expand |
Hi Tejas, On Wed, May 17, 2023 at 07:27:54PM +0530, Tejas Upadhyay wrote: > From: Chris Wilson <chris.p.wilson@intel.com> > > Allow compute contexts to submit the maximal amount of work without > blocking userspace. > > The original size for user LRC ring's (SZ_16K) was chosen to minimise > memory consumption, without being so small as to frequently stall in the > middle of workloads. With the main consumers being GL / media pipelines > of 2 or 3 batches per frame, we want to support ~10 requests in flight > to allow for the application to control throttling without stalling > within a frame. > > v2: > - cover with else part > > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Thanks, Andi
Hi Tejas, Just one note... On Wed, May 17, 2023 at 07:27:54PM +0530, Tejas Upadhyay wrote: > From: Chris Wilson <chris.p.wilson@intel.com> > > Allow compute contexts to submit the maximal amount of work without > blocking userspace. > > The original size for user LRC ring's (SZ_16K) was chosen to minimise > memory consumption, without being so small as to frequently stall in the > middle of workloads. With the main consumers being GL / media pipelines > of 2 or 3 batches per frame, we want to support ~10 requests in flight > to allow for the application to control throttling without stalling > within a frame. > > v2: > - cover with else part > > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> ... please, next time add your SoB here as you are sending it. No need to resend, I will add it. Andi > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index 5402a7bbcb1d..9a9ff84c90d7 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -964,7 +964,11 @@ static int intel_context_set_gem(struct intel_context *ce, > RCU_INIT_POINTER(ce->gem_context, ctx); > > GEM_BUG_ON(intel_context_is_pinned(ce)); > - ce->ring_size = SZ_16K; > + > + if (ce->engine->class == COMPUTE_CLASS) > + ce->ring_size = SZ_512K; > + else > + ce->ring_size = SZ_16K; > > i915_vm_put(ce->vm); > ce->vm = i915_gem_context_get_eb_vm(ctx); > -- > 2.25.1
Hi Tejas, On Wed, May 17, 2023 at 07:27:54PM +0530, Tejas Upadhyay wrote: > From: Chris Wilson <chris.p.wilson@intel.com> > > Allow compute contexts to submit the maximal amount of work without > blocking userspace. > > The original size for user LRC ring's (SZ_16K) was chosen to minimise > memory consumption, without being so small as to frequently stall in the > middle of workloads. With the main consumers being GL / media pipelines > of 2 or 3 batches per frame, we want to support ~10 requests in flight > to allow for the application to control throttling without stalling > within a frame. > > v2: > - cover with else part > > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> pushed in drm-intel-gt-next. Thanks, Andi
> -----Original Message----- > From: Andi Shyti <andi.shyti@linux.intel.com> > Sent: Wednesday, May 31, 2023 2:42 AM > To: Upadhyay, Tejas <tejas.upadhyay@intel.com> > Cc: intel-gfx@lists.freedesktop.org; Wilson, Chris P > <chris.p.wilson@intel.com> > Subject: Re: [Intel-gfx] [PATCH V2] drm/i915/gem: Use large rings for > compute contexts > > Hi Tejas, > > Just one note... Thanks, Noted. > > On Wed, May 17, 2023 at 07:27:54PM +0530, Tejas Upadhyay wrote: > > From: Chris Wilson <chris.p.wilson@intel.com> > > > > Allow compute contexts to submit the maximal amount of work without > > blocking userspace. > > > > The original size for user LRC ring's (SZ_16K) was chosen to minimise > > memory consumption, without being so small as to frequently stall in > > the middle of workloads. With the main consumers being GL / media > > pipelines of 2 or 3 batches per frame, we want to support ~10 requests > > in flight to allow for the application to control throttling without > > stalling within a frame. > > > > v2: > > - cover with else part > > > > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> > > ... please, next time add your SoB here as you are sending it. > > No need to resend, I will add it. > > Andi > > > --- > > drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c > > b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > index 5402a7bbcb1d..9a9ff84c90d7 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > @@ -964,7 +964,11 @@ static int intel_context_set_gem(struct > intel_context *ce, > > RCU_INIT_POINTER(ce->gem_context, ctx); > > > > GEM_BUG_ON(intel_context_is_pinned(ce)); > > - ce->ring_size = SZ_16K; > > + > > + if (ce->engine->class == COMPUTE_CLASS) > > + ce->ring_size = SZ_512K; > > + else > > + ce->ring_size = SZ_16K; > > > > i915_vm_put(ce->vm); > > ce->vm = i915_gem_context_get_eb_vm(ctx); > > -- > > 2.25.1
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 5402a7bbcb1d..9a9ff84c90d7 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -964,7 +964,11 @@ static int intel_context_set_gem(struct intel_context *ce, RCU_INIT_POINTER(ce->gem_context, ctx); GEM_BUG_ON(intel_context_is_pinned(ce)); - ce->ring_size = SZ_16K; + + if (ce->engine->class == COMPUTE_CLASS) + ce->ring_size = SZ_512K; + else + ce->ring_size = SZ_16K; i915_vm_put(ce->vm); ce->vm = i915_gem_context_get_eb_vm(ctx);