Message ID | 20230523232214.55282-16-terry.bowman@amd.com |
---|---|
State | Superseded |
Headers | show |
Series | cxl/pci: Add support for RCH RAS error handling | expand |
On Tue, 23 May 2023 18:22:06 -0500 Terry Bowman <terry.bowman@amd.com> wrote: > From: Robert Richter <rrichter@amd.com> > > The Component Register base address @component_reg_phys is no longer > used after the rework of the Component Register setup which now uses > struct member @comp_map instead. Remove the base address. > > Signed-off-by: Robert Richter <rrichter@amd.com> > Signed-off-by: Terry Bowman <terry.bowman@amd.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 183f9f8548e2..d147f08780d0 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -987,7 +987,6 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, dport->dev = dport_dev; dport->port_id = port_id; - dport->component_reg_phys = component_reg_phys; dport->port = port; dport->rcrb.base = rcrb; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 4365d46606df..6134644b51f8 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -601,7 +601,6 @@ struct cxl_rcrb_info { * @port: reference to cxl_port that contains this downstream port * @comp_map: component register capability mappings * @port_id: unique hardware identifier for dport in decoder target list - * @component_reg_phys: downstream port component registers * @rch: Indicate whether this dport was enumerated in RCH or VH mode * @rcrb: Data about the Root Complex Register Block layout */ @@ -610,7 +609,6 @@ struct cxl_dport { struct cxl_port *port; struct cxl_register_map comp_map; int port_id; - resource_size_t component_reg_phys; bool rch; struct cxl_rcrb_info rcrb; };