| Message ID | 20230523173451.2932113-1-jacob.jun.pan@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Re-enable IDXD kernel workqueue under DMA API | expand |
Hi Jason, Do you have any comments on this set? this is a follow-up of the IOASID removal series. Thanks a lot for your time. Jacob On Tue, 23 May 2023 10:34:47 -0700, Jacob Pan <jacob.jun.pan@linux.intel.com> wrote: > Hi Joerg and all, > > IDXD kernel work queues were disabled due to the flawed use of kernel VA > and SVA API. > Link: > https://lore.kernel.org/linux-iommu/20210511194726.GP1002214@nvidia.com/ > > The solution is to enable it under DMA API where IDXD shared workqueue > users can use ENQCMDS to submit work on buffers mapped by DMA API. > > This patchset adds support for attaching PASID to the device's default > domain and the ability to allocate global PASIDs from IOMMU APIs. IDXD > driver can then re-enable the kernel work queues and use them under DMA > API. > > This depends on the IOASID removal series. (merged) > https://lore.kernel.org/all/ZCaUBJvUMsJyD7EW@8bytes.org/ > > > Thanks, > > Jacob > > --- > Changelog: > v7: > - renamed IOMMU_DEF_RID_PASID to be IOMMU_NO_PASID to be more > generic (Jean) > - simplify range checking for sva PASID (Baolu) > v6: > - use a simplified version of vt-d driver change for > set_device_pasid from Baolu. > - check and rename global PASID allocation base > v5: > - exclude two patches related to supervisor mode, taken by VT-d > maintainer Baolu. > - move PASID range check into allocation API so that device > drivers only need to pass in struct device*. (Kevin) > - factor out helper functions in device-domain attach (Baolu) > - make explicit use of RID_PASID across architectures > v4: > - move dummy functions outside ifdef CONFIG_IOMMU_SVA (Baolu) > - dropped domain type check while disabling idxd system PASID > (Baolu) > > v3: > - moved global PASID allocation API from SVA to IOMMU (Kevin) > - remove #ifdef around global PASID reservation during boot > (Baolu) > - remove restriction on PASID 0 allocation (Baolu) > - fix a bug in sysfs domain change when attaching devices > - clear idxd user interrupt enable bit after disabling device( > Fenghua) v2: > - refactored device PASID attach domain ops based on Baolu's > early patch > - addressed TLB flush gap > - explicitly reserve RID_PASID from SVA PASID number space > - get dma domain directly, avoid checking domain types > > > > Jacob Pan (3): > iommu: Generalize PASID 0 for normal DMA w/o PASID > iommu: Move global PASID allocation from SVA to core > dmaengine/idxd: Re-enable kernel workqueue under DMA API > > Lu Baolu (1): > iommu/vt-d: Add set_dev_pasid callback for dma domain > > drivers/dma/idxd/device.c | 30 +--- > drivers/dma/idxd/dma.c | 5 +- > drivers/dma/idxd/init.c | 60 ++++++- > drivers/dma/idxd/sysfs.c | 7 - > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 +- > drivers/iommu/intel/iommu.c | 159 +++++++++++++++--- > drivers/iommu/intel/iommu.h | 7 + > drivers/iommu/intel/pasid.c | 2 +- > drivers/iommu/intel/pasid.h | 1 - > drivers/iommu/iommu-sva.c | 28 ++- > drivers/iommu/iommu.c | 24 +++ > include/linux/iommu.h | 11 ++ > 13 files changed, 261 insertions(+), 85 deletions(-) > Thanks, Jacob
On Wed, May 31, 2023 at 09:33:42PM -0700, Jacob Pan wrote: > Hi Jason, > > Do you have any comments on this set? this is a follow-up of the IOASID > removal series. It looks OK in general, I see it still needs another spin before the driver part is OK? Jason
Hi Jason, On Thu, 1 Jun 2023 11:21:55 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote: > On Wed, May 31, 2023 at 09:33:42PM -0700, Jacob Pan wrote: > > Hi Jason, > > > > Do you have any comments on this set? this is a follow-up of the IOASID > > removal series. > > It looks OK in general, I see it still needs another spin before the > driver part is OK? Yes, I will get that from Baolu and test. Thanks, Jacob