| Message ID | 20230515071042.2038-1-yung-chuan.liao@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | ASoC/soundwire: add support for ACE2.x | expand |
On 15-05-23, 15:10, Bard Liao wrote: > This series uses the abstraction added in past kernel cycles to provide > support for the ACE2.x integration. The existing SHIM and Cadence > registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some > parts also moved to the HDaudio Extended Multi link structures. Nothing > fundamentally different except for the register map. > > This series only provides the basic mechanisms to expose SoundWire-based > DAIs. The PCI parts and DSP management will be contributed later, and the > DAI ops are now empty as well. > > The change is mainly on SoundWire. It would be better to go through > SoundWire tree. Applied, thanks
On 5/27/23 05:36, Vinod Koul wrote: > On 15-05-23, 15:10, Bard Liao wrote: >> This series uses the abstraction added in past kernel cycles to provide >> support for the ACE2.x integration. The existing SHIM and Cadence >> registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some >> parts also moved to the HDaudio Extended Multi link structures. Nothing >> fundamentally different except for the register map. >> >> This series only provides the basic mechanisms to expose SoundWire-based >> DAIs. The PCI parts and DSP management will be contributed later, and the >> DAI ops are now empty as well. >> >> The change is mainly on SoundWire. It would be better to go through >> SoundWire tree. > > Applied, thanks Hi Vinod, is there a way you could provide an immutable tag for Mark Brown, the patch1 in this set is required for my next set of ASoC LunarLake patches? "ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake" adds the SOF_INTEL_ACE_2_0 definition to select different ops for LunarLake. Thank you -Pierre
Hi Pierre, On 02-06-23, 15:46, Pierre-Louis Bossart wrote: > On 5/27/23 05:36, Vinod Koul wrote: > > On 15-05-23, 15:10, Bard Liao wrote: > >> This series uses the abstraction added in past kernel cycles to provide > >> support for the ACE2.x integration. The existing SHIM and Cadence > >> registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some > >> parts also moved to the HDaudio Extended Multi link structures. Nothing > >> fundamentally different except for the register map. > >> > >> This series only provides the basic mechanisms to expose SoundWire-based > >> DAIs. The PCI parts and DSP management will be contributed later, and the > >> DAI ops are now empty as well. > >> > >> The change is mainly on SoundWire. It would be better to go through > >> SoundWire tree. > > > > Applied, thanks > > Hi Vinod, is there a way you could provide an immutable tag for Mark > Brown, the patch1 in this set is required for my next set of ASoC > LunarLake patches? Unfortunately, I have picked the whole series into next. If I was aware I would have pushed them to a topic. Mark can pull sdw/next but that would bring other things as well which may not be preferred. I guess next best would be wait few weeks (rc1) > > "ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake" adds > the SOF_INTEL_ACE_2_0 definition to select different ops for LunarLake. > > Thank you > -Pierre
On 6/7/23 08:07, Vinod Koul wrote: > > Hi Pierre, > > On 02-06-23, 15:46, Pierre-Louis Bossart wrote: >> On 5/27/23 05:36, Vinod Koul wrote: >>> On 15-05-23, 15:10, Bard Liao wrote: >>>> This series uses the abstraction added in past kernel cycles to provide >>>> support for the ACE2.x integration. The existing SHIM and Cadence >>>> registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some >>>> parts also moved to the HDaudio Extended Multi link structures. Nothing >>>> fundamentally different except for the register map. >>>> >>>> This series only provides the basic mechanisms to expose SoundWire-based >>>> DAIs. The PCI parts and DSP management will be contributed later, and the >>>> DAI ops are now empty as well. >>>> >>>> The change is mainly on SoundWire. It would be better to go through >>>> SoundWire tree. >>> >>> Applied, thanks >> >> Hi Vinod, is there a way you could provide an immutable tag for Mark >> Brown, the patch1 in this set is required for my next set of ASoC >> LunarLake patches? > > Unfortunately, I have picked the whole series into next. If I was aware > I would have pushed them to a topic. > > Mark can pull sdw/next but that would bring other things as well which > may not be preferred. I guess next best would be wait few weeks (rc1) Yeah, it's a miss on my side, I forgot about this one-line enum dependency for DMIC/SSP. SoundWire has more dependencies so we expected to send the relevant patches in the next cycle. DMIC/SSP is quite simple and could have been part of 6.5. Oh well. >> "ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake" adds >> the SOF_INTEL_ACE_2_0 definition to select different ops for LunarLake. >> >> Thank you >> -Pierre >
This series uses the abstraction added in past kernel cycles to provide support for the ACE2.x integration. The existing SHIM and Cadence registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some parts also moved to the HDaudio Extended Multi link structures. Nothing fundamentally different except for the register map. This series only provides the basic mechanisms to expose SoundWire-based DAIs. The PCI parts and DSP management will be contributed later, and the DAI ops are now empty as well. The change is mainly on SoundWire. It would be better to go through SoundWire tree. v2: - Some cleanup for free, trigger, hw_params callbacks before introducing ACE2.x callbacks. Pierre-Louis Bossart (26): ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake soundwire: intel: add ACE2.x SHIM definitions soundwire: intel_ace2x: add empty new ops for LunarLake soundwire/ASOC: Intel: update offsets for LunarLake soundwire: intel/cadence: set ip_offset at run-time ASoC/soundwire: intel: pass hdac_bus pointer for link management soundwire: intel: add eml_lock in the interface for new platforms ASoC: SOF: Intel: hda: retrieve SoundWire eml_lock and pass pointer soundwire: intel_init: use eml_lock parameter soundwire: intel_ace2x: add debugfs support soundwire: intel_ace2x: add link power-up/down helpers soundwire: intel_ace2x: set SYNCPRD before powering-up soundwire: intel_ace2x: configure link PHY soundwire: intel_ace2x: add DAI registration soundwire: intel_ace2x: add sync_arm/sync_go helpers soundwire: intel_ace2x: use common helpers for bus start/stop soundwire: intel_ace2x: enable wake support soundwire: intel_ace2x: add check_cmdsync_unlocked helper soundwire: bus: add new manager callback to deal with peripheral enumeration soundwire: intel_ace2x: add new_peripheral_assigned callback soundwire: intel_ace2x: add pre/post bank switch callbacks ASoC: SOF/soundwire: re-add substream in params_stream structure soundwire: intel: remove .trigger callback implementation soundwire: intel: use substream for .trigger callback soundwire: intel: remove .free callback implementation soundwire: intel: use substream for .free callback drivers/soundwire/Makefile | 3 +- drivers/soundwire/bus.c | 3 + drivers/soundwire/cadence_master.h | 2 + drivers/soundwire/intel.c | 54 +--- drivers/soundwire/intel.h | 16 + drivers/soundwire/intel_ace2x.c | 393 ++++++++++++++++++++++++ drivers/soundwire/intel_ace2x_debugfs.c | 147 +++++++++ drivers/soundwire/intel_auxdevice.c | 17 + drivers/soundwire/intel_init.c | 21 +- include/linux/soundwire/sdw.h | 3 +- include/linux/soundwire/sdw_intel.h | 94 +++++- sound/soc/sof/intel/hda.c | 33 +- sound/soc/sof/intel/shim.h | 1 + 13 files changed, 723 insertions(+), 64 deletions(-) create mode 100644 drivers/soundwire/intel_ace2x.c create mode 100644 drivers/soundwire/intel_ace2x_debugfs.c