| Message ID | 1685982557-28326-8-git-send-email-quic_rohiagar@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add devicetree support for SDX75 Modem and IDP | expand |
On 5.06.2023 18:29, Rohit Agarwal wrote: > From: Imran Shaik <quic_imrashai@quicinc.com> > > Add support for GCC and RPMHCC clock nodes for SDX75 platform. > > Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sdx75.dtsi | 37 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 36 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi > index 3d1646b..f83eef8 100644 > --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi > @@ -7,6 +7,7 @@ > */ > > #include <dt-bindings/clock/qcom,rpmh.h> > +#include <dt-bindings/clock/qcom,sdx75-gcc.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > > @@ -22,7 +23,21 @@ > reg = <0 0x80000000 0 0>; > }; > > - clocks { }; > + clocks { > + xo_board: xo_board { > + compatible = "fixed-clock"; > + clock-frequency = <76800000>; > + clock-output-names = "xo_board"; > + #clock-cells = <0>; > + }; > + > + sleep_clk: sleep_clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + clock-output-names = "sleep_clk"; > + #clock-cells = <0>; > + }; > + }; > > cpus { > #address-cells = <2>; > @@ -358,6 +373,18 @@ > ranges = <0 0 0 0 0x10 0>; > dma-ranges = <0 0 0 0 0x10 0>; > > + gcc: clock-controller@80000 { > + compatible = "qcom,sdx75-gcc"; > + reg = <0x0 0x0080000 0x0 0x1f7400>; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&sleep_clk>; > + clock-names = "bi_tcxo", > + "sleep_clk"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > tcsr_mutex: hwlock@1f40000 { > compatible = "qcom,tcsr-mutex"; > reg = <0x0 0x01f40000 0x0 0x40000>; > @@ -520,6 +547,14 @@ > apps_bcm_voter: bcm_voter { > compatible = "qcom,bcm-voter"; > }; > + > + rpmhcc: clock-controller { > + compatible = "qcom,sdx75-rpmh-clk"; > + clocks = <&xo_board>; > + clock-names = "xo"; > + #clock-cells = <1>; > + }; > + > }; > }; >
On Mon, 5 Jun 2023 at 19:30, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: > > From: Imran Shaik <quic_imrashai@quicinc.com> > > Add support for GCC and RPMHCC clock nodes for SDX75 platform. > > Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sdx75.dtsi | 37 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 36 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi > index 3d1646b..f83eef8 100644 > --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi > @@ -7,6 +7,7 @@ > */ > > #include <dt-bindings/clock/qcom,rpmh.h> > +#include <dt-bindings/clock/qcom,sdx75-gcc.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > > @@ -22,7 +23,21 @@ > reg = <0 0x80000000 0 0>; > }; > > - clocks { }; > + clocks { > + xo_board: xo_board { No underscores in node names > + compatible = "fixed-clock"; > + clock-frequency = <76800000>; > + clock-output-names = "xo_board"; Why do you need this? > + #clock-cells = <0>; > + }; > + > + sleep_clk: sleep_clk { No underscores in node names > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + clock-output-names = "sleep_clk"; Why do you need this? > + #clock-cells = <0>; > + }; > + }; > > cpus { > #address-cells = <2>; > @@ -358,6 +373,18 @@ > ranges = <0 0 0 0 0x10 0>; > dma-ranges = <0 0 0 0 0x10 0>; > > + gcc: clock-controller@80000 { > + compatible = "qcom,sdx75-gcc"; > + reg = <0x0 0x0080000 0x0 0x1f7400>; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&sleep_clk>; > + clock-names = "bi_tcxo", > + "sleep_clk"; As this is a new platform, it should not be using clock-names to bind gcc clocks. Please use clock indices instead. > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > tcsr_mutex: hwlock@1f40000 { > compatible = "qcom,tcsr-mutex"; > reg = <0x0 0x01f40000 0x0 0x40000>; > @@ -520,6 +547,14 @@ > apps_bcm_voter: bcm_voter { > compatible = "qcom,bcm-voter"; > }; > + > + rpmhcc: clock-controller { > + compatible = "qcom,sdx75-rpmh-clk"; > + clocks = <&xo_board>; > + clock-names = "xo"; > + #clock-cells = <1>; > + }; > + > }; > }; > > -- > 2.7.4 >
On 6/6/2023 12:00 AM, Dmitry Baryshkov wrote: > On Mon, 5 Jun 2023 at 19:30, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote: >> From: Imran Shaik <quic_imrashai@quicinc.com> >> >> Add support for GCC and RPMHCC clock nodes for SDX75 platform. >> >> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> >> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sdx75.dtsi | 37 ++++++++++++++++++++++++++++++++++++- >> 1 file changed, 36 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi >> index 3d1646b..f83eef8 100644 >> --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi >> @@ -7,6 +7,7 @@ >> */ >> >> #include <dt-bindings/clock/qcom,rpmh.h> >> +#include <dt-bindings/clock/qcom,sdx75-gcc.h> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> >> @@ -22,7 +23,21 @@ >> reg = <0 0x80000000 0 0>; >> }; >> >> - clocks { }; >> + clocks { >> + xo_board: xo_board { > No underscores in node names > >> + compatible = "fixed-clock"; >> + clock-frequency = <76800000>; >> + clock-output-names = "xo_board"; > Why do you need this? > >> + #clock-cells = <0>; >> + }; >> + >> + sleep_clk: sleep_clk { > No underscores in node names > >> + compatible = "fixed-clock"; >> + clock-frequency = <32000>; >> + clock-output-names = "sleep_clk"; > Why do you need this? > >> + #clock-cells = <0>; >> + }; >> + }; >> >> cpus { >> #address-cells = <2>; >> @@ -358,6 +373,18 @@ >> ranges = <0 0 0 0 0x10 0>; >> dma-ranges = <0 0 0 0 0x10 0>; >> >> + gcc: clock-controller@80000 { >> + compatible = "qcom,sdx75-gcc"; >> + reg = <0x0 0x0080000 0x0 0x1f7400>; >> + clocks = <&rpmhcc RPMH_CXO_CLK>, >> + <&sleep_clk>; >> + clock-names = "bi_tcxo", >> + "sleep_clk"; > As this is a new platform, it should not be using clock-names to bind > gcc clocks. Please use clock indices instead. Will update all as suggested, Thanks, Rohit. >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + #power-domain-cells = <1>; >> + }; >> + >> tcsr_mutex: hwlock@1f40000 { >> compatible = "qcom,tcsr-mutex"; >> reg = <0x0 0x01f40000 0x0 0x40000>; >> @@ -520,6 +547,14 @@ >> apps_bcm_voter: bcm_voter { >> compatible = "qcom,bcm-voter"; >> }; >> + >> + rpmhcc: clock-controller { >> + compatible = "qcom,sdx75-rpmh-clk"; >> + clocks = <&xo_board>; >> + clock-names = "xo"; >> + #clock-cells = <1>; >> + }; >> + >> }; >> }; >> >> -- >> 2.7.4 >> >
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi index 3d1646b..f83eef8 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -7,6 +7,7 @@ */ #include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,sdx75-gcc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> @@ -22,7 +23,21 @@ reg = <0 0x80000000 0 0>; }; - clocks { }; + clocks { + xo_board: xo_board { + compatible = "fixed-clock"; + clock-frequency = <76800000>; + clock-output-names = "xo_board"; + #clock-cells = <0>; + }; + + sleep_clk: sleep_clk { + compatible = "fixed-clock"; + clock-frequency = <32000>; + clock-output-names = "sleep_clk"; + #clock-cells = <0>; + }; + }; cpus { #address-cells = <2>; @@ -358,6 +373,18 @@ ranges = <0 0 0 0 0x10 0>; dma-ranges = <0 0 0 0 0x10 0>; + gcc: clock-controller@80000 { + compatible = "qcom,sdx75-gcc"; + reg = <0x0 0x0080000 0x0 0x1f7400>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>; + clock-names = "bi_tcxo", + "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -520,6 +547,14 @@ apps_bcm_voter: bcm_voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sdx75-rpmh-clk"; + clocks = <&xo_board>; + clock-names = "xo"; + #clock-cells = <1>; + }; + }; };