| Message ID | 2ccb849de420ced29b3f9be38e12664e1919b631.1686729444.git.Sandor.yu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Initial support for Cadence MHDP8501(HDMI/DP) for i.MX8MQ | expand |
Hi Sandor, Am Donnerstag, 15. Juni 2023, 03:38:16 CEST schrieb Sandor Yu: > Add bindings for Freescale iMX8MQ DP and HDMI PHY. > > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> > --- > .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > diff --git > a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml new > file mode 100644 > index 000000000000..917f113503dc > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/fsl,imx8mq-dp-hdmi-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC > + > +maintainers: > + - Sandor Yu <sandor.yu@nxp.com> > + > +properties: > + compatible: > + enum: > + - fsl,imx8mq-dp-phy > + - fsl,imx8mq-hdmi-phy How is it intended to select DP or HDMI? E.g. provide a single default dp-phy node in imx8mq.dtsi and change the compatible to HDMI on board-level? Best regards, Alexander > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: PHY reference clock. > + - description: APB clock. > + > + clock-names: > + items: > + - const: ref > + - const: apb > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - "#phy-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx8mq-clock.h> > + #include <dt-bindings/phy/phy.h> > + dp_phy: phy@32c00000 { > + compatible = "fsl,imx8mq-dp-phy"; > + reg = <0x32c00000 0x100000>; > + #phy-cells = <0>; > + clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; > + clock-names = "ref", "apb"; > + };
Hi Alexander, Thanks for your comments, > -----Original Message----- > From: Alexander Stein <alexander.stein@ew.tq-group.com> > Sent: 2023年6月16日 17:35 > To: andrzej.hajda@intel.com; neil.armstrong@linaro.org; > robert.foss@linaro.org; Laurent.pinchart@ideasonboard.com; > jonas@kwiboo.se; jernej.skrabec@gmail.com; airlied@gmail.com; > daniel@ffwll.ch; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > shawnguo@kernel.org; s.hauer@pengutronix.de; festevam@gmail.com; > vkoul@kernel.org; dri-devel@lists.freedesktop.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; linux-phy@lists.infradead.org > Cc: Oliver Brown <oliver.brown@nxp.com>; Sandor Yu <sandor.yu@nxp.com>; > dl-linux-imx <linux-imx@nxp.com>; kernel@pengutronix.de; Sandor Yu > <sandor.yu@nxp.com> > Subject: [EXT] Re: [PATCH v6 6/8] dt-bindings: phy: Add Freescale iMX8MQ DP > and HDMI PHY > > Caution: This is an external email. Please take care when clicking links or > opening attachments. When in doubt, report the message using the 'Report > this email' button > > > Hi Sandor, > > Am Donnerstag, 15. Juni 2023, 03:38:16 CEST schrieb Sandor Yu: > > Add bindings for Freescale iMX8MQ DP and HDMI PHY. > > > > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> > > --- > > .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 > > +++++++++++++++++++ > > 1 file changed, 53 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > new file mode 100644 index 000000000000..917f113503dc > > --- /dev/null > > +++ > b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yam > > +++ l > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: > > +http://devi/ > > > +cetree.org%2Fschemas%2Fphy%2Ffsl%2Cimx8mq-dp-hdmi-phy.yaml%23&d > ata=05 > > > +%7C01%7CSandor.yu%40nxp.com%7Cf2d4e5ea99fa4f5776bf08db6e4ce7ba > %7C686e > > > +a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638225048817792176%7C > Unknown%7 > > > +CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW > wiLCJX > > > +VCI6Mn0%3D%7C3000%7C%7C%7C&sdata=ayYA0rayDR2w1LDgU53VtCitw > MH9PnoblX2k > > +Jhbu6Gs%3D&reserved=0 > > +$schema: > > +http://devi/ > > > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7CSandor. > yu%40n > > > +xp.com%7Cf2d4e5ea99fa4f5776bf08db6e4ce7ba%7C686ea1d3bc2b4c6fa92 > cd99c5 > > > +c301635%7C0%7C0%7C638225048817792176%7CUnknown%7CTWFpbGZs > b3d8eyJWIjoi > > > +MC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3 > 000%7C% > > > +7C%7C&sdata=DagQtrIblGEk3T1mamSmI2010SRszqhIpJ4piXy3L4M%3D&re > served=0 > > + > > +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC > > + > > +maintainers: > > + - Sandor Yu <sandor.yu@nxp.com> > > + > > +properties: > > + compatible: > > + enum: > > + - fsl,imx8mq-dp-phy > > + - fsl,imx8mq-hdmi-phy > > How is it intended to select DP or HDMI? E.g. provide a single default dp-phy > node in imx8mq.dtsi and change the compatible to HDMI on board-level? > The PHY driver select should align with HDMI/DP driver base on board type. For HDMI board: fsl,imx8mq-hdmi-phy + fsl,imx8mq-mhdp8501-hdmi For DP board: fsl,imx8mq-dp-phy + fsl,imx8mq-mhdp8501-dp B.R Sandor > Best regards, > Alexander > > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PHY reference clock. > > + - description: APB clock. > > + > > + clock-names: > > + items: > > + - const: ref > > + - const: apb > > + > > + "#phy-cells": > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - clock-names > > + - "#phy-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/imx8mq-clock.h> > > + #include <dt-bindings/phy/phy.h> > > + dp_phy: phy@32c00000 { > > + compatible = "fsl,imx8mq-dp-phy"; > > + reg = <0x32c00000 0x100000>; > > + #phy-cells = <0>; > > + clocks = <&hdmi_phy_27m>, <&clk > IMX8MQ_CLK_DISP_APB_ROOT>; > > + clock-names = "ref", "apb"; > > + }; > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq/ > -group.com%2F&data=05%7C01%7CSandor.yu%40nxp.com%7Cf2d4e5ea99fa > 4f5776bf08db6e4ce7ba%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C > 0%7C638225048817792176%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4w > LjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C > %7C%7C&sdata=6uih84XByS6aX519z7l50amZl2XnPIMSggyfSD4xd4M%3D&re > served=0 >
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml new file mode 100644 index 000000000000..917f113503dc --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/fsl,imx8mq-dp-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC + +maintainers: + - Sandor Yu <sandor.yu@nxp.com> + +properties: + compatible: + enum: + - fsl,imx8mq-dp-phy + - fsl,imx8mq-hdmi-phy + + reg: + maxItems: 1 + + clocks: + items: + - description: PHY reference clock. + - description: APB clock. + + clock-names: + items: + - const: ref + - const: apb + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mq-clock.h> + #include <dt-bindings/phy/phy.h> + dp_phy: phy@32c00000 { + compatible = "fsl,imx8mq-dp-phy"; + reg = <0x32c00000 0x100000>; + #phy-cells = <0>; + clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; + clock-names = "ref", "apb"; + };
Add bindings for Freescale iMX8MQ DP and HDMI PHY. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> --- .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml