Message ID | 168686425375.2950427.10184250250033053574.stgit@djiang5-mobl3 (mailing list archive) |
---|---|
State | Handled Elsewhere, archived |
Headers | show |
Series | acpi: numa: add target support for generic port to HMAT parsing | expand |
On Thu, 15 Jun 2023 14:24:13 -0700 Dave Jiang <dave.jiang@intel.com> wrote: > Add generic port support for the parsing of HMAT system locality sub-table. > The attributes will be added to the third array member of the access > coordinates in order to not mix with the existing memory attributes. It only > provides the system locality attributes from initator to the generic port > targets and is missing the rest of the data to the actual memory device. > > The complete attributes will be updated when a memory device is > attached and the system locality information is calculated end to end. > > Signed-off-by: Dave Jiang <dave.jiang@intel.com> With rename of device_handle, or a comment perhaps, in earlier patch. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > --- > v3: > - Drop continue after setting gen target access data. (Jonathan) > v2: > - Fix commit log runon sentence. (Jonathan) > - Add a check for memory type for skipping other access levels. (Jonathan) > - NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan) > --- > drivers/acpi/numa/hmat.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c > index cb240f5233fe..32b951cd5ee4 100644 > --- a/drivers/acpi/numa/hmat.c > +++ b/drivers/acpi/numa/hmat.c > @@ -60,6 +60,7 @@ struct target_cache { > enum { > NODE_ACCESS_CLASS_0 = 0, > NODE_ACCESS_CLASS_1, > + NODE_ACCESS_CLASS_GENPORT_SINK, > NODE_ACCESS_CLASS_MAX, > }; > > @@ -329,6 +330,9 @@ static __init void hmat_update_target(unsigned int tgt_pxm, unsigned int init_px > return; > > if (target && target->processor_pxm == init_pxm) { > + if (*target->device_handle) Just for reference - this is where I suddenly wondered what a generic thing like a device_handle had to do with this path ;) > + hmat_update_target_access(target, type, value, > + NODE_ACCESS_CLASS_GENPORT_SINK); Real nitpick but could we put them in order of the enum... That is put this at the end. > hmat_update_target_access(target, type, value, > NODE_ACCESS_CLASS_0); > /* If the node has a CPU, update access 1 */ > >
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c index cb240f5233fe..32b951cd5ee4 100644 --- a/drivers/acpi/numa/hmat.c +++ b/drivers/acpi/numa/hmat.c @@ -60,6 +60,7 @@ struct target_cache { enum { NODE_ACCESS_CLASS_0 = 0, NODE_ACCESS_CLASS_1, + NODE_ACCESS_CLASS_GENPORT_SINK, NODE_ACCESS_CLASS_MAX, }; @@ -329,6 +330,9 @@ static __init void hmat_update_target(unsigned int tgt_pxm, unsigned int init_px return; if (target && target->processor_pxm == init_pxm) { + if (*target->device_handle) + hmat_update_target_access(target, type, value, + NODE_ACCESS_CLASS_GENPORT_SINK); hmat_update_target_access(target, type, value, NODE_ACCESS_CLASS_0); /* If the node has a CPU, update access 1 */
Add generic port support for the parsing of HMAT system locality sub-table. The attributes will be added to the third array member of the access coordinates in order to not mix with the existing memory attributes. It only provides the system locality attributes from initator to the generic port targets and is missing the rest of the data to the actual memory device. The complete attributes will be updated when a memory device is attached and the system locality information is calculated end to end. Signed-off-by: Dave Jiang <dave.jiang@intel.com> --- v3: - Drop continue after setting gen target access data. (Jonathan) v2: - Fix commit log runon sentence. (Jonathan) - Add a check for memory type for skipping other access levels. (Jonathan) - NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan) --- drivers/acpi/numa/hmat.c | 4 ++++ 1 file changed, 4 insertions(+)