| Message ID | TYAP286MB03151148AF8C054621DD55C3BC23A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 670f77f76f650b1b341d31d009cc2fb03a4d1fcf |
| Headers | show |
| Series | mips: ralink: match all supported system controller compatible strings | expand |
On Fri, Jun 23, 2023 at 2:18 AM Shiji Yang <yangshiji66@outlook.com> wrote: > > Recently, A new clock and reset controller driver has been introduced to > the ralink mips target[1]. It provides proper system control and adds more > SoC specific compatible strings. In order to better initialize CPUs, this > patch removes the outdated "ralink,mt7620a-sysc" and add all dt-binding > documented compatible strings to the system controller match table. > > [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com/ > > Signed-off-by: Shiji Yang <yangshiji66@outlook.com> > --- > arch/mips/ralink/of.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Thanks, Sergio Paracuellos
On Fri, Jun 23, 2023 at 08:17:48AM +0800, Shiji Yang wrote: > Recently, A new clock and reset controller driver has been introduced to > the ralink mips target[1]. It provides proper system control and adds more > SoC specific compatible strings. In order to better initialize CPUs, this > patch removes the outdated "ralink,mt7620a-sysc" and add all dt-binding > documented compatible strings to the system controller match table. > > [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com/ > > Signed-off-by: Shiji Yang <yangshiji66@outlook.com> > --- > arch/mips/ralink/of.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c > index 53a2ae9ee..1c6c953d5 100644 > --- a/arch/mips/ralink/of.c > +++ b/arch/mips/ralink/of.c > @@ -40,10 +40,15 @@ static const struct of_device_id mtmips_memc_match[] = { > > static const struct of_device_id mtmips_sysc_match[] = { > { .compatible = "mediatek,mt7621-sysc" }, > - { .compatible = "ralink,mt7620a-sysc" }, > + { .compatible = "ralink,mt7620-sysc" }, > + { .compatible = "ralink,mt7628-sysc" }, > + { .compatible = "ralink,mt7688-sysc" }, > { .compatible = "ralink,rt2880-sysc" }, > { .compatible = "ralink,rt3050-sysc" }, > + { .compatible = "ralink,rt3052-sysc" }, > + { .compatible = "ralink,rt3352-sysc" }, > { .compatible = "ralink,rt3883-sysc" }, > + { .compatible = "ralink,rt5350-sysc" }, > {} > }; > > -- > 2.30.2 applied to mips-next. Thomas.
diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index 53a2ae9ee..1c6c953d5 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c @@ -40,10 +40,15 @@ static const struct of_device_id mtmips_memc_match[] = { static const struct of_device_id mtmips_sysc_match[] = { { .compatible = "mediatek,mt7621-sysc" }, - { .compatible = "ralink,mt7620a-sysc" }, + { .compatible = "ralink,mt7620-sysc" }, + { .compatible = "ralink,mt7628-sysc" }, + { .compatible = "ralink,mt7688-sysc" }, { .compatible = "ralink,rt2880-sysc" }, { .compatible = "ralink,rt3050-sysc" }, + { .compatible = "ralink,rt3052-sysc" }, + { .compatible = "ralink,rt3352-sysc" }, { .compatible = "ralink,rt3883-sysc" }, + { .compatible = "ralink,rt5350-sysc" }, {} };
Recently, A new clock and reset controller driver has been introduced to the ralink mips target[1]. It provides proper system control and adds more SoC specific compatible strings. In order to better initialize CPUs, this patch removes the outdated "ralink,mt7620a-sysc" and add all dt-binding documented compatible strings to the system controller match table. [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com/ Signed-off-by: Shiji Yang <yangshiji66@outlook.com> --- arch/mips/ralink/of.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)