| Message ID | 20230710134317.2794177-3-chaitanya.kumar.borah@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MTL Degamma implementation | expand |
> -----Original Message----- > From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com> > Sent: Monday, July 10, 2023 7:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: jani.nikula@linux.intel.com; Shankar, Uma <uma.shankar@intel.com>; Borah, > Chaitanya Kumar <chaitanya.kumar.borah@intel.com> > Subject: [PATCH v2 2/2] drm/i915/color: Downscale degamma lut values read from > hardware > > For MTL and beyond, convert back the 24 bit lut values read from HW to 16 bit > values to maintain parity with userspace values. This way we avoid pipe config > mismatch for pre-csc lut values. > > v2: Add helper function to downscale values (Jani) Change looks ok to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> > --- > drivers/gpu/drm/i915/display/intel_color.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 15ada7fada96..41666e778c03 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -3456,6 +3456,14 @@ static struct drm_property_blob > *glk_read_degamma_lut(struct intel_crtc *crtc) > for (i = 0; i < lut_size; i++) { > u32 val = intel_de_read_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe)); > > + /* > + * For MTL and beyond, convert back the 24 bit lut values > + * read from HW to 16 bit values to maintain parity with > + * userspace values > + */ > + if (DISPLAY_VER(dev_priv) >= 14) > + val = change_lut_val_precision(val, 16, 24); > + > lut[i].red = val; > lut[i].green = val; > lut[i].blue = val; > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 15ada7fada96..41666e778c03 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -3456,6 +3456,14 @@ static struct drm_property_blob *glk_read_degamma_lut(struct intel_crtc *crtc) for (i = 0; i < lut_size; i++) { u32 val = intel_de_read_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe)); + /* + * For MTL and beyond, convert back the 24 bit lut values + * read from HW to 16 bit values to maintain parity with + * userspace values + */ + if (DISPLAY_VER(dev_priv) >= 14) + val = change_lut_val_precision(val, 16, 24); + lut[i].red = val; lut[i].green = val; lut[i].blue = val;
For MTL and beyond, convert back the 24 bit lut values read from HW to 16 bit values to maintain parity with userspace values. This way we avoid pipe config mismatch for pre-csc lut values. v2: Add helper function to downscale values (Jani) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> --- drivers/gpu/drm/i915/display/intel_color.c | 8 ++++++++ 1 file changed, 8 insertions(+)