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[bpf-next] docs/bpf: Fix malformed documentation

Message ID 20230730004251.381307-1-yonghong.song@linux.dev (mailing list archive)
State Accepted
Commit fb213ecbb8ac56b2d5569737f59126e91f87829a
Delegated to: BPF
Headers show
Series [bpf-next] docs/bpf: Fix malformed documentation | expand

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netdev/series_format success Single patches do not need cover letters
netdev/tree_selection success Clearly marked for bpf-next
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 9 this patch: 9
netdev/cc_maintainers warning 11 maintainers not CCed: void@manifault.com kpsingh@kernel.org martin.lau@linux.dev john.fastabend@gmail.com song@kernel.org sdf@google.com corbet@lwn.net jolsa@kernel.org haoluo@google.com dthaler@microsoft.com linux-doc@vger.kernel.org
netdev/build_clang success Errors and warnings before: 9 this patch: 9
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netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success Fixes tag looks correct
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netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 57 lines checked
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
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Commit Message

Yonghong Song July 30, 2023, 12:42 a.m. UTC 
Two issues are fixed:
  1. Malformed table due to newly-introduced BPF_MOVSX
  2. Missing reference link for ``Sign-extension load operations``

Fixes: 245d4c40c09b ("docs/bpf: Add documentation for new instructions")
Cc: bpf@ietf.org
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202307291840.Cqhj7uox-lkp@intel.com/
Signed-off-by: Yonghong Song <yonghong.song@linux.dev>
---
 .../bpf/standardization/instruction-set.rst   | 45 ++++++++++---------
 1 file changed, 24 insertions(+), 21 deletions(-)

Comments

patchwork-bot+netdevbpf@kernel.org July 30, 2023, 2 a.m. UTC | #1 
Hello:

This patch was applied to bpf/bpf-next.git (master)
by Alexei Starovoitov <ast@kernel.org>:

On Sat, 29 Jul 2023 17:42:51 -0700 you wrote:
> Two issues are fixed:
>   1. Malformed table due to newly-introduced BPF_MOVSX
>   2. Missing reference link for ``Sign-extension load operations``
> 
> Fixes: 245d4c40c09b ("docs/bpf: Add documentation for new instructions")
> Cc: bpf@ietf.org
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202307291840.Cqhj7uox-lkp@intel.com/
> Signed-off-by: Yonghong Song <yonghong.song@linux.dev>
> 
> [...]

Here is the summary with links:
  - [bpf-next] docs/bpf: Fix malformed documentation
    https://git.kernel.org/bpf/bpf-next/c/fb213ecbb8ac

You are awesome, thank you!
diff mbox series

Patch

diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index fb8154cedd84..655494ac7af6 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -154,27 +154,27 @@  otherwise identical operations.
 The 'code' field encodes the operation as below, where 'src' and 'dst' refer
 to the values of the source and destination registers, respectively.
 
-========  =====  =======  ==========================================================
-code      value  offset   description
-========  =====  =======  ==========================================================
-BPF_ADD   0x00   0        dst += src
-BPF_SUB   0x10   0        dst -= src
-BPF_MUL   0x20   0        dst \*= src
-BPF_DIV   0x30   0        dst = (src != 0) ? (dst / src) : 0
-BPF_SDIV  0x30   1        dst = (src != 0) ? (dst s/ src) : 0
-BPF_OR    0x40   0        dst \|= src
-BPF_AND   0x50   0        dst &= src
-BPF_LSH   0x60   0        dst <<= (src & mask)
-BPF_RSH   0x70   0        dst >>= (src & mask)
-BPF_NEG   0x80   0        dst = -dst
-BPF_MOD   0x90   0        dst = (src != 0) ? (dst % src) : dst
-BPF_SMOD  0x90   1        dst = (src != 0) ? (dst s% src) : dst
-BPF_XOR   0xa0   0        dst ^= src
-BPF_MOV   0xb0   0        dst = src
-BPF_MOVSX 0xb0   8/16/32  dst = (s8,s16,s32)src
-BPF_ARSH  0xc0   0        sign extending dst >>= (src & mask)
-BPF_END   0xd0   0        byte swap operations (see `Byte swap instructions`_ below)
-========  =====  =======  ==========================================================
+=========  =====  =======  ==========================================================
+code       value  offset   description
+=========  =====  =======  ==========================================================
+BPF_ADD    0x00   0        dst += src
+BPF_SUB    0x10   0        dst -= src
+BPF_MUL    0x20   0        dst \*= src
+BPF_DIV    0x30   0        dst = (src != 0) ? (dst / src) : 0
+BPF_SDIV   0x30   1        dst = (src != 0) ? (dst s/ src) : 0
+BPF_OR     0x40   0        dst \|= src
+BPF_AND    0x50   0        dst &= src
+BPF_LSH    0x60   0        dst <<= (src & mask)
+BPF_RSH    0x70   0        dst >>= (src & mask)
+BPF_NEG    0x80   0        dst = -dst
+BPF_MOD    0x90   0        dst = (src != 0) ? (dst % src) : dst
+BPF_SMOD   0x90   1        dst = (src != 0) ? (dst s% src) : dst
+BPF_XOR    0xa0   0        dst ^= src
+BPF_MOV    0xb0   0        dst = src
+BPF_MOVSX  0xb0   8/16/32  dst = (s8,s16,s32)src
+BPF_ARSH   0xc0   0        sign extending dst >>= (src & mask)
+BPF_END    0xd0   0        byte swap operations (see `Byte swap instructions`_ below)
+=========  =====  =======  ==========================================================
 
 Underflow and overflow are allowed during arithmetic operations, meaning
 the 64-bit or 32-bit value will wrap. If eBPF program execution would
@@ -397,6 +397,9 @@  instructions that transfer data between a register and memory.
 Where size is one of: ``BPF_B``, ``BPF_H``, ``BPF_W``, or ``BPF_DW`` and
 'unsigned size' is one of u8, u16, u32 or u64.
 
+Sign-extension load operations
+------------------------------
+
 The ``BPF_MEMSX`` mode modifier is used to encode sign-extension load
 instructions that transfer data between a register and memory.