| Message ID | 20230802183655.4188640-1-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v2,1/2] drm/msm/dpu: fix DSC 1.2 block lengths | expand |
On Wed, 2 Aug 2023 at 21:36, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote: > > All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. > This includes the common block itself, enc subblocks and some empty > space around. Change that to pass 0x4 instead, the length of common > register block itself. > > Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") > Reported-by: Ryan McCann <quic_rmccann@quicinc.com> > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Of course, it should have been v3, with the v2 having been sent on July 8th. Confusion is the price of sending a series with no cover letter. Please excuse me. > > Changes since v1: > - Rebased on top of the catalog changes > > --- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++++++------ > .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- > 5 files changed, 19 insertions(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > index c906b6864b5e..f8d16f9bf528 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > @@ -283,22 +283,22 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = { > static const struct dpu_dsc_cfg sm8350_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > index 2bf9f34e54c6..3b5061c4402a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > @@ -163,7 +163,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { > static const struct dpu_dsc_cfg sc7280_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > index ccd0477f4877..58f5e25679b1 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > @@ -286,32 +286,32 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = { > static const struct dpu_dsc_cfg sc8280xp_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_2_0", .id = DSC_4, > - .base = 0x82000, .len = 0x29c, > + .base = 0x82000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_2_1", .id = DSC_5, > - .base = 0x82000, .len = 0x29c, > + .base = 0x82000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > index 2b2e9d4800f8..1b12178dfbca 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > @@ -305,22 +305,22 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = { > static const struct dpu_dsc_cfg sm8450_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > index 833be1167499..f2ab02d04440 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > @@ -320,22 +320,22 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = { > static const struct dpu_dsc_cfg sm8550_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > -- > 2.39.2 >
On 2023-08-02 21:36:54, Dmitry Baryshkov wrote: > All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. > This includes the common block itself, enc subblocks and some empty > space around. Change that to pass 0x4 instead, the length of common > register block itself. > > Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") > Reported-by: Ryan McCann <quic_rmccann@quicinc.com> > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > > Changes since v1: > - Rebased on top of the catalog changes > > --- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++++++------ > .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- > 5 files changed, 19 insertions(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > index c906b6864b5e..f8d16f9bf528 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h > @@ -283,22 +283,22 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = { > static const struct dpu_dsc_cfg sm8350_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > index 2bf9f34e54c6..3b5061c4402a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h > @@ -163,7 +163,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { > static const struct dpu_dsc_cfg sc7280_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > index ccd0477f4877..58f5e25679b1 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h > @@ -286,32 +286,32 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = { > static const struct dpu_dsc_cfg sc8280xp_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_2_0", .id = DSC_4, > - .base = 0x82000, .len = 0x29c, > + .base = 0x82000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_2_1", .id = DSC_5, > - .base = 0x82000, .len = 0x29c, > + .base = 0x82000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > index 2b2e9d4800f8..1b12178dfbca 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h > @@ -305,22 +305,22 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = { > static const struct dpu_dsc_cfg sm8450_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > index 833be1167499..f2ab02d04440 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h > @@ -320,22 +320,22 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = { > static const struct dpu_dsc_cfg sm8550_dsc[] = { > { > .name = "dce_0_0", .id = DSC_0, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_0_1", .id = DSC_1, > - .base = 0x80000, .len = 0x29c, > + .base = 0x80000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2), > .sblk = &dsc_sblk_1, > }, { > .name = "dce_1_0", .id = DSC_2, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_0, > }, { > .name = "dce_1_1", .id = DSC_3, > - .base = 0x81000, .len = 0x29c, > + .base = 0x81000, .len = 0x4, > .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), > .sblk = &dsc_sblk_1, > }, > -- > 2.39.2 >
On Wed, 02 Aug 2023 21:36:54 +0300, Dmitry Baryshkov wrote: > All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. > This includes the common block itself, enc subblocks and some empty > space around. Change that to pass 0x4 instead, the length of common > register block itself. > > Applied, thanks! [1/2] drm/msm/dpu: fix DSC 1.2 block lengths https://gitlab.freedesktop.org/lumag/msm/-/commit/e550ad0e5c3d [2/2] drm/msm/dpu: fix DSC 1.2 enc subblock length https://gitlab.freedesktop.org/lumag/msm/-/commit/57a1ca6cf73b Best regards,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h index c906b6864b5e..f8d16f9bf528 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h @@ -283,22 +283,22 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = { static const struct dpu_dsc_cfg sm8350_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_0, }, { .name = "dce_0_1", .id = DSC_1, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_1, }, { .name = "dce_1_0", .id = DSC_2, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_0, }, { .name = "dce_1_1", .id = DSC_3, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_1, }, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h index 2bf9f34e54c6..3b5061c4402a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h @@ -163,7 +163,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { static const struct dpu_dsc_cfg sc7280_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_0, }, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h index ccd0477f4877..58f5e25679b1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h @@ -286,32 +286,32 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = { static const struct dpu_dsc_cfg sc8280xp_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_0, }, { .name = "dce_0_1", .id = DSC_1, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_1, }, { .name = "dce_1_0", .id = DSC_2, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_0, }, { .name = "dce_1_1", .id = DSC_3, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_1, }, { .name = "dce_2_0", .id = DSC_4, - .base = 0x82000, .len = 0x29c, + .base = 0x82000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_0, }, { .name = "dce_2_1", .id = DSC_5, - .base = 0x82000, .len = 0x29c, + .base = 0x82000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_1, }, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h index 2b2e9d4800f8..1b12178dfbca 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h @@ -305,22 +305,22 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = { static const struct dpu_dsc_cfg sm8450_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_0, }, { .name = "dce_0_1", .id = DSC_1, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_1, }, { .name = "dce_1_0", .id = DSC_2, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_0, }, { .name = "dce_1_1", .id = DSC_3, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_1, }, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h index 833be1167499..f2ab02d04440 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -320,22 +320,22 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = { static const struct dpu_dsc_cfg sm8550_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_0, }, { .name = "dce_0_1", .id = DSC_1, - .base = 0x80000, .len = 0x29c, + .base = 0x80000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2), .sblk = &dsc_sblk_1, }, { .name = "dce_1_0", .id = DSC_2, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_0, }, { .name = "dce_1_1", .id = DSC_3, - .base = 0x81000, .len = 0x29c, + .base = 0x81000, .len = 0x4, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), .sblk = &dsc_sblk_1, },
All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. This includes the common block itself, enc subblocks and some empty space around. Change that to pass 0x4 instead, the length of common register block itself. Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") Reported-by: Ryan McCann <quic_rmccann@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Changes since v1: - Rebased on top of the catalog changes --- .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++++++------ .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- 5 files changed, 19 insertions(+), 19 deletions(-)