| Message ID | 20230803-master-refactor-instructions-v4-v1-10-2128e61fa4ff@rivosinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | RISC-V: Refactor instructions | expand |
Hi Charlie,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 5d0c230f1de8c7515b6567d9afba1f196fb4e2f4]
url: https://github.com/intel-lab-lkp/linux/commits/Charlie-Jenkins/RISC-V-Expand-instruction-definitions/20230804-101437
base: 5d0c230f1de8c7515b6567d9afba1f196fb4e2f4
patch link: https://lore.kernel.org/r/20230803-master-refactor-instructions-v4-v1-10-2128e61fa4ff%40rivosinc.com
patch subject: [PATCH 10/10] RISC-V: Refactor bug and traps instructions
config: riscv-allyesconfig (https://download.01.org/0day-ci/archive/20230804/202308041213.o49SRQWZ-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230804/202308041213.o49SRQWZ-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308041213.o49SRQWZ-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> arch/riscv/kernel/elf_kexec.c:326: warning: "RV_X" redefined
326 | #define RV_X(x, s, n) (((x) >> (s)) & ((1 << (n)) - 1))
|
In file included from arch/riscv/include/asm/bug.h:14,
from include/linux/bug.h:5,
from include/linux/thread_info.h:13,
from include/asm-generic/preempt.h:5,
from ./arch/riscv/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:79,
from include/linux/spinlock.h:56,
from include/linux/ipc.h:5,
from include/uapi/linux/sem.h:5,
from include/linux/sem.h:5,
from include/linux/compat.h:14,
from arch/riscv/include/asm/elf.h:12,
from include/linux/elf.h:6,
from arch/riscv/kernel/elf_kexec.c:15:
arch/riscv/include/asm/insn.h:1915: note: this is the location of the previous definition
1915 | #define RV_X(X, s, mask) (((X) >> (s)) & (mask))
|
vim +/RV_X +326 arch/riscv/kernel/elf_kexec.c
6261586e0c91db1 Liao Chang 2022-04-08 325
838b3e28488f702 Li Zhengyu 2022-04-08 @326 #define RV_X(x, s, n) (((x) >> (s)) & ((1 << (n)) - 1))
838b3e28488f702 Li Zhengyu 2022-04-08 327 #define RISCV_IMM_BITS 12
838b3e28488f702 Li Zhengyu 2022-04-08 328 #define RISCV_IMM_REACH (1LL << RISCV_IMM_BITS)
838b3e28488f702 Li Zhengyu 2022-04-08 329 #define RISCV_CONST_HIGH_PART(x) \
838b3e28488f702 Li Zhengyu 2022-04-08 330 (((x) + (RISCV_IMM_REACH >> 1)) & ~(RISCV_IMM_REACH - 1))
838b3e28488f702 Li Zhengyu 2022-04-08 331 #define RISCV_CONST_LOW_PART(x) ((x) - RISCV_CONST_HIGH_PART(x))
838b3e28488f702 Li Zhengyu 2022-04-08 332
diff --git a/arch/riscv/include/asm/bug.h b/arch/riscv/include/asm/bug.h index 1aaea81fb141..6d9002d93f85 100644 --- a/arch/riscv/include/asm/bug.h +++ b/arch/riscv/include/asm/bug.h @@ -11,21 +11,13 @@ #include <linux/types.h> #include <asm/asm.h> +#include <asm/insn.h> -#define __INSN_LENGTH_MASK _UL(0x3) -#define __INSN_LENGTH_32 _UL(0x3) -#define __COMPRESSED_INSN_MASK _UL(0xffff) +#define __IS_BUG_INSN_32(insn) riscv_insn_is_c_ebreak(insn) +#define __IS_BUG_INSN_16(insn) riscv_insn_is_ebreak(insn) -#define __BUG_INSN_32 _UL(0x00100073) /* ebreak */ -#define __BUG_INSN_16 _UL(0x9002) /* c.ebreak */ - -#define GET_INSN_LENGTH(insn) \ -({ \ - unsigned long __len; \ - __len = ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) ? \ - 4UL : 2UL; \ - __len; \ -}) +#define __BUG_INSN_32 RVG_MATCH_EBREAK +#define __BUG_INSN_16 RVC_MATCH_C_EBREAK typedef u32 bug_insn_t; diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index f910dfccbf5d..970b118d36b5 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -22,6 +22,7 @@ #include <asm/asm-prototypes.h> #include <asm/bug.h> #include <asm/csr.h> +#include <asm/insn.h> #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/syscall.h> @@ -243,7 +244,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc) if (get_kernel_nofault(insn, (bug_insn_t *)pc)) return 0; - return GET_INSN_LENGTH(insn); + return INSN_LEN(insn); } void handle_break(struct pt_regs *regs) @@ -389,10 +390,10 @@ int is_valid_bugaddr(unsigned long pc) return 0; if (get_kernel_nofault(insn, (bug_insn_t *)pc)) return 0; - if ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) - return (insn == __BUG_INSN_32); + if (INSN_IS_C(insn)) + return __IS_BUG_INSN_16(insn); else - return ((insn & __COMPRESSED_INSN_MASK) == __BUG_INSN_16); + return __IS_BUG_INSN_32(insn); } #endif /* CONFIG_GENERIC_BUG */
Use shared instruction definitions in insn.h instead of manually constructing them. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> --- arch/riscv/include/asm/bug.h | 18 +++++------------- arch/riscv/kernel/traps.c | 9 +++++---- 2 files changed, 10 insertions(+), 17 deletions(-)